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URL https://opencores.org/ocsvn/klc32/klc32/trunk

Subversion Repositories klc32

[/] [klc32/] [trunk/] [rtl/] [verilog/] [RTS.v] - Diff between revs 2 and 12

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Rev 2 Rev 12
Line 38... Line 38...
                else
                else
                        usp <= usp + 32'd4 + ir[21:6];
                        usp <= usp + 32'd4 + ir[21:6];
                pc <= {dat_i[31:2],2'b00}+{ir[25:22],2'b00};
                pc <= {dat_i[31:2],2'b00}+{ir[25:22],2'b00};
                state <= IFETCH;
                state <= IFETCH;
        end
        end
        else if (err_i) begin
 
                cyc_o <= 1'b0;
 
                stb_o <= 1'b0;
 
                sel_o <= 4'b0000;
 
                vector <= `BUS_ERR_VECTOR;
 
                state <= TRAP;
 
        end
 
 
 
 
 
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