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[/] [m65c02/] [trunk/] [Src/] [M65C02-Test-Programs/] [Klaus2m5_Functional_Tests/] [65C02_FT.a65] - Diff between revs 2 and 3

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Line 13... Line 13...
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
; GNU General Public License for more details.
;
;
; You should have received a copy of the GNU General Public License
; You should have received a copy of the GNU General Public License
; along with this program.  If not, see .
; along with this program.  If not, see .
 
;
 
;
; This program is designed to test all opcodes of a 6502 emulator using all
; This program is designed to test all opcodes of a 6502 emulator using all
; addressing modes with focus on propper setting of the processor status
; addressing modes with focus on propper setting of the processor status
; register bits.
; register bits.
;
;
; version 23-jul-2013
; version 23-jul-2013
Line 66... Line 66...
;   19-jul-2013  allowed ROM vectors to be loaded when load_data_direct = 0
;   19-jul-2013  allowed ROM vectors to be loaded when load_data_direct = 0
;                added test sequence check to detect if tests jump their fence
;                added test sequence check to detect if tests jump their fence
;   23-jul-2013  added RAM integrity check
;   23-jul-2013  added RAM integrity check
;
;
;   30-Aug-2013  Modified by Michael A. Morris to allow selection of tests
;   30-Aug-2013  Modified by Michael A. Morris to allow selection of tests
 
;   04-Jan-2014  Modified trap vectors to use sbc2oslite BRK handler for error
 
;                trapping. Enabled success macro, which returns to the monitor.
 
;                Disabled BRK trap test in order to trap out to the monitor.
 
;   30-Jan-2014  Modified success macro to issue brk instruction instead of rts.
 
;   27-Nov-2014  Modified success macro to use stp instruction instead of brk
 
;   07-Dec-2014  Modified success macro to use brk instruction instead of stp
;
;
; C O N F I G U R A T I O N
; C O N F I G U R A T I O N
;
;
;ROM_vectors writable (0=no, 1=yes)
;ROM_vectors writable (0=no, 1=yes)
 
;
;if ROM vectors can not be used interrupts will not be trapped
;if ROM vectors can not be used interrupts will not be trapped
;as a consequence BRK can not be tested but will be emulated to test RTI
;as a consequence BRK can not be tested but will be emulated to test RTI
ROM_vectors = 1
;
 
ROM_vectors = 0
 
;
;load_data_direct (0=move from code segment, 1=load directly)
;load_data_direct (0=move from code segment, 1=load directly)
;loading directly is preferred but may not be supported by your platform
;loading directly is preferred but may not be supported by your platform
;0 produces only consecutive object code, 1 is not suitable for a binary image
;0 produces only consecutive object code, 1 is not suitable for a binary image
load_data_direct = 1
;
 
load_data_direct = 0
 
;
;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
;change) 2 requires extra code and is not recommended. SEI & CLI can only be
;change) 2 requires extra code and is not recommended. SEI & CLI can only be
;tested if you allow changing the interrupt status (I_flag = 3)
;tested if you allow changing the interrupt status (I_flag = 3)
 
;
I_flag = 3
I_flag = 3
 
;
;configure memory - try to stay away from memory used by the system
;configure memory - try to stay away from memory used by the system
;zero_page memory start address, $50 (80) consecutive Bytes required
;zero_page memory start address, $50 (80) consecutive Bytes required
;                                add 2 if I_flag = 2
;                                add 2 if I_flag = 2
zero_page = $a
;
 
zero_page = $B0
 
;
;data_segment memory start address, $5B (91) consecutive Bytes required
;data_segment memory start address, $5B (91) consecutive Bytes required
 
;
data_segment = $200
data_segment = $200
    if (data_segment & $ff) != 0
    if (data_segment & $ff) != 0
        ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
        ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
    endif
    endif
 
;
;code_segment memory start address, 13kB of consecutive space required
;code_segment memory start address, 13kB of consecutive space required
;                                   add 2.5 kB if I_flag = 2
;                                   add 2.5 kB if I_flag = 2
;parts of the code are self modifying and must reside in RAM
;parts of the code are self modifying and must reside in RAM
 
;
code_segment = $400
code_segment = $400
 
;
;RAM integrity test option. Checks for undesired RAM writes.
;RAM integrity test option. Checks for undesired RAM writes.
;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
 
;
ram_top = -1
ram_top = -1
 
;ram_top = $40
 
;
 
;   Define the top of stack location
 
;
 
stack_top = $1FF
;
;
;Skip to ADC/SBC tests
;Skip to ADC/SBC tests
;
;
skip_part_1  = 0
skip_part_1  = 0
;
;
;Skip Binary or Decimal mode ADC/SBC instruction tests
;Skip Binary or Decimal mode ADC/SBC instruction tests
;
;
skip_bin_test = 1
skip_bin_test = 0
skip_dec_test = 0
skip_dec_test = 0
 
;
        noopt       ;do not take shortcuts
        noopt       ;do not take shortcuts
 
;
;macros for error & success traps to allow user modification
;macros for error & success traps to allow user modification
;example:
;example:
 
;
;trap    macro
;trap    macro
;        jsr my_error_handler
;        jsr my_error_handler
;        endm
;        endm
 
;
;trap_eq macro
;trap_eq macro
;        bne skip\?
;        bne skip\?
;        trap           ;failed equal (zero)
;        trap           ;failed equal (zero)
;skip\?
;skip\?
;        endm
;        endm
;
;
; my_error_handler should pop the calling address from the stack and report it.
; my_error_handler should pop the calling address from the stack and report it.
; putting larger portions of code (more than 3 bytes) inside the trap macro
; putting larger portions of code (more than 3 bytes) inside the trap macro
; may lead to branch range problems for some tests.
; may lead to branch range problems for some tests.
 
 
trap    macro
trap    macro
        jmp *           ;failed anyway
;        db      $db         ; M65C02/M65C02A SToP instruction
 
        brk                 ; Use BRK to return to the monitor
 
        db      test_num
        endm
        endm
 
 
trap_eq macro
trap_eq macro
        beq *           ;failed equal (zero)
        bne skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_ne macro
trap_ne macro
        bne *           ;failed not equal (non zero)
        beq skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_cs macro
trap_cs macro
        bcs *           ;failed carry set
        bcc skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_cc macro
trap_cc macro
        bcc *           ;failed carry clear
        bcs skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_mi macro
trap_mi macro
        bmi *           ;failed minus (bit 7 set)
        bpl skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_pl macro
trap_pl macro
        bpl *           ;failed plus (bit 7 clear)
        bmi skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_vs macro
trap_vs macro
        bvs *           ;failed overflow set
        bvc skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
trap_vc macro
trap_vc macro
        bvc *           ;failed overflow clear
        bvs skip\?
 
        trap           ;failed equal (zero)
 
skip\?
        endm
        endm
 
 
success macro
success macro
        jmp *           ;test passed, no errors
        brk
 
        db      test_num+1
        endm
        endm
 
 
 
 
carry   equ %00000001   ;flag bits in status
carry   equ %00000001   ;flag bits in status
zero    equ %00000010
zero    equ %00000010
intdis  equ %00000100
intdis  equ %00000100
decmode equ %00001000
decmode equ %00001000
break   equ %00010000
break   equ %00010000
Line 184... Line 239...
m8i     equ $ff&~intdis     ;8 bit mask - interrupt disable
m8i     equ $ff&~intdis     ;8 bit mask - interrupt disable
 
 
;macros to allow masking of status bits.
;macros to allow masking of status bits.
;masking of interrupt enable/disable on load and compare
;masking of interrupt enable/disable on load and compare
;masking of always on bits after PHP or BRK (unused & break) on compare
;masking of always on bits after PHP or BRK (unused & break) on compare
 
 
        if I_flag = 0
        if I_flag = 0
 
 
load_flag   macro
load_flag   macro
            lda #\1&m8i         ;force enable interrupts (mask I)
            lda #\1&m8i         ;force enable interrupts (mask I)
            endm
            endm
 
 
cmp_flag    macro
cmp_flag    macro
            cmp #(\1|fao)&m8i   ;I_flag is always enabled + always on bits
            cmp #(\1|fao)&m8i   ;I_flag is always enabled + always on bits
            endm
            endm
 
 
eor_flag    macro
eor_flag    macro
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
            endm
            endm
 
 
        endif
        endif
 
 
        if I_flag = 1
        if I_flag = 1
 
 
load_flag   macro
load_flag   macro
            lda #\1|intdis      ;force disable interrupts
            lda #\1|intdis      ;force disable interrupts
            endm
            endm
 
 
cmp_flag    macro
cmp_flag    macro
            cmp #(\1|fai)&m8    ;I_flag is always disabled + always on bits
            cmp #(\1|fai)&m8    ;I_flag is always disabled + always on bits
            endm
            endm
 
 
eor_flag    macro
eor_flag    macro
            eor #(\1|fai)       ;invert expected flags + always on bits + I
            eor #(\1|fai)       ;invert expected flags + always on bits + I
            endm
            endm
 
 
        endif
        endif
 
 
        if I_flag = 2
        if I_flag = 2
 
 
load_flag   macro
load_flag   macro
            lda #\1
            lda #\1
            ora flag_I_on       ;restore I-flag
            ora flag_I_on       ;restore I-flag
            and flag_I_off
            and flag_I_off
            endm
            endm
 
 
cmp_flag    macro
cmp_flag    macro
            eor flag_I_on       ;I_flag is never changed
            eor flag_I_on       ;I_flag is never changed
            cmp #(\1|fao)&m8i   ;expected flags + always on bits, mask I
            cmp #(\1|fao)&m8i   ;expected flags + always on bits, mask I
            endm
            endm
 
 
eor_flag    macro
eor_flag    macro
            eor flag_I_on       ;I_flag is never changed
            eor flag_I_on       ;I_flag is never changed
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
            eor #(\1&m8i|fao)   ;mask I, invert expected flags + always on bits
            endm
            endm
 
 
        endif
        endif
 
 
        if I_flag = 3
        if I_flag = 3
 
 
load_flag   macro
load_flag   macro
            lda #\1             ;allow test to change I-flag (no mask)
            lda #\1             ;allow test to change I-flag (no mask)
            endm
            endm
 
 
cmp_flag    macro
cmp_flag    macro
            cmp #(\1|fao)&m8    ;expected flags + always on bits
            cmp #(\1|fao)&m8    ;expected flags + always on bits
            endm
            endm
 
 
eor_flag    macro
eor_flag    macro
            eor #\1|fao         ;invert expected flags + always on bits
            eor #\1|fao         ;invert expected flags + always on bits
            endm
            endm
 
 
        endif
        endif
 
 
;macros to set (register|memory|zeropage) & status
;macros to set (register|memory|zeropage) & status
 
 
set_stat    macro       ;setting flags in the processor status register
set_stat    macro       ;setting flags in the processor status register
            load_flag \1
            load_flag \1
            pha         ;use stack to load status
            pha         ;use stack to load status
            plp
            plp
            endm
            endm
Line 308... Line 384...
            sta abst,x
            sta abst,x
            plp
            plp
            endm
            endm
 
 
;macros to test (register|memory|zeropage) & status & (mask)
;macros to test (register|memory|zeropage) & status & (mask)
 
 
tst_stat    macro       ;testing flags in the processor status register
tst_stat    macro       ;testing flags in the processor status register
            php         ;save status
            php         ;save status
            php         ;use stack to retrieve status
            php         ;use stack to retrieve status
            pla
            pla
            cmp_flag \1
            cmp_flag \1
Line 418... Line 495...
 
 
; RAM integrity test
; RAM integrity test
;   verifies that none of the previous tests has altered RAM outside of the
;   verifies that none of the previous tests has altered RAM outside of the
;   designated write areas.
;   designated write areas.
;   uses zpt word as indirect pointer, zpt+2 word as checksum
;   uses zpt word as indirect pointer, zpt+2 word as checksum
 
 
        if ram_top > -1
        if ram_top > -1
 
 
check_ram   macro
check_ram   macro
            cld
            cld
            lda #0
            lda #0
            sta zpt         ;set low byte of indirect pointer
            sta zpt         ;set low byte of indirect pointer
            sta zpt+3       ;checksum high byte
            sta zpt+3       ;checksum high byte
Line 463... Line 542...
            trap_ne         ;checksum mismatch
            trap_ne         ;checksum mismatch
            lda zpt+3       ;checksum high is
            lda zpt+3       ;checksum high is
            cmp ram_chksm+1 ;checksum high expected
            cmp ram_chksm+1 ;checksum high expected
            trap_ne         ;checksum mismatch
            trap_ne         ;checksum mismatch
            endm
            endm
 
 
        else
        else
 
 
check_ram   macro
check_ram   macro
            ;RAM check disabled - RAM size not set
            ;RAM check disabled - RAM size not set
            endm
            endm
 
 
        endif
        endif
 
 
next_test   macro           ;make sure, tests don't jump the fence
next_test   macro           ;make sure, tests don't jump the fence
            lda test_case   ;previous test
            lda test_case   ;previous test
            cmp #test_num
            cmp #test_num
Line 480... Line 562...
            sta test_case
            sta test_case
            ;check_ram       ;uncomment to find altered RAM after each test
            ;check_ram       ;uncomment to find altered RAM after each test
            endm
            endm
 
 
    if load_data_direct = 1
    if load_data_direct = 1
 
 
        data
        data
 
 
    else
    else
        bss                 ;uninitialized segment, copy of data at end of code!
 
    endif
;        bss                 ;uninitialized segment, copy of data at end of code!
;
        code
;        org zero_page
 
        org 0
        org 0
        ds  zero_page
        ds  zero_page
 
 
 
    endif
 
;
 
        org zero_page
 
;
 
;        org 0
 
;        ds  zero_page
 
;
;break test interrupt save
;break test interrupt save
 
;
 
 
irq_a   ds  1               ;a register
irq_a   ds  1               ;a register
irq_x   ds  1               ;x register
irq_x   ds  1               ;x register
 
 
    if I_flag = 2
    if I_flag = 2
 
 
;masking for I bit in status
;masking for I bit in status
 
 
flag_I_on   ds  1           ;or mask to load flags
flag_I_on   ds  1           ;or mask to load flags
flag_I_off  ds  1           ;and mask to load flags
flag_I_off  ds  1           ;and mask to load flags
 
 
    endif
    endif
 
 
zpt                         ;5 bytes store/modify test area
zpt                         ;5 bytes store/modify test area
 
 
;add/subtract operand generation and result/flag prediction
;add/subtract operand generation and result/flag prediction
 
 
adfc    ds  1               ;carry flag before op
adfc    ds  1               ;carry flag before op
ad1     ds  1               ;operand 1 - accumulator
ad1     ds  1               ;operand 1 - accumulator
ad2     ds  1               ;operand 2 - memory / immediate
ad2     ds  1               ;operand 2 - memory / immediate
adrl    ds  1               ;expected result bits 0-7
adrl    ds  1               ;expected result bits 0-7
adrh    ds  1               ;expected result bit 8 (carry)
adrh    ds  1               ;expected result bit 8 (carry)
adrf    ds  1               ;expected flags NV0000ZC (-V in decimal mode)
adrf    ds  1               ;expected flags NV0000ZC (-V in decimal mode)
sb2     ds  1               ;operand 2 complemented for subtract
sb2     ds  1               ;operand 2 complemented for subtract
 
 
zp_bss
zp_bss
 
 
zp1     db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
zp1     db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
zp7f    db  $7f             ;test pattern for compare
zp7f    db  $7f             ;test pattern for compare
 
 
;logical zeropage operands
;logical zeropage operands
 
 
zpOR    db  0,$1f,$71,$80   ;test pattern for OR
zpOR    db  0,$1f,$71,$80   ;test pattern for OR
zpAN    db  $0f,$ff,$7f,$80 ;test pattern for AND
zpAN    db  $0f,$ff,$7f,$80 ;test pattern for AND
zpEO    db  $ff,$0f,$8f,$8f ;test pattern for EOR
zpEO    db  $ff,$0f,$8f,$8f ;test pattern for EOR
 
 
;indirect addressing pointers
;indirect addressing pointers
 
 
ind1    dw  abs1            ;indirect pointer to pattern in absolute memory
ind1    dw  abs1            ;indirect pointer to pattern in absolute memory
        dw  abs1+1
        dw  abs1+1
        dw  abs1+2
        dw  abs1+2
        dw  abs1+3
        dw  abs1+3
        dw  abs7f
        dw  abs7f
Line 536... Line 642...
        dw  absEO+3
        dw  absEO+3
indOR   dw  absOR           ;indirect pointer to OR pattern in absolute memory
indOR   dw  absOR           ;indirect pointer to OR pattern in absolute memory
        dw  absOR+1
        dw  absOR+1
        dw  absOR+2
        dw  absOR+2
        dw  absOR+3
        dw  absOR+3
 
 
;add/subtract indirect pointers
;add/subtract indirect pointers
 
 
adi2    dw  ada2            ;indirect pointer to operand 2 in absolute memory
adi2    dw  ada2            ;indirect pointer to operand 2 in absolute memory
sbi2    dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
sbi2    dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
adiy2   dw  ada2-$ff        ;with offset for indirect indexed
adiy2   dw  ada2-$ff        ;with offset for indirect indexed
sbiy2   dw  sba2-$ff
sbiy2   dw  sba2-$ff
 
 
zp_bss_end
zp_bss_end
 
 
        org data_segment
        org data_segment
 
 
test_case   ds  1           ;current test number
test_case   ds  1           ;current test number
ram_chksm   ds  2           ;checksum for RAM integrity test
ram_chksm   ds  2           ;checksum for RAM integrity test
 
 
;add/subtract operand copy - abs tests write area
;add/subtract operand copy - abs tests write area
 
 
abst                        ;5 bytes store/modify test area
abst                        ;5 bytes store/modify test area
ada2    ds  1               ;operand 2
ada2    ds  1               ;operand 2
sba2    ds  1               ;operand 2 complemented for subtract
sba2    ds  1               ;operand 2 complemented for subtract
        ds  3               ;fill remaining bytes
        ds  3               ;fill remaining bytes
 
 
data_bss
data_bss
 
 
abs1    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
abs1    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
abs7f   db  $7f             ;test pattern for compare
abs7f   db  $7f             ;test pattern for compare
 
 
;loads
;loads
 
 
fLDx    db  fn,fn,0,fz      ;expected flags for load
fLDx    db  fn,fn,0,fz      ;expected flags for load
 
 
;shifts
;shifts
 
 
rASL                        ;expected result ASL & ROL -carry
rASL                        ;expected result ASL & ROL -carry
rROL    db  $86,$04,$82,0   ; "
rROL    db  $86,$04,$82,0   ; "
rROLc   db  $87,$05,$83,1   ;expected result ROL +carry
rROLc   db  $87,$05,$83,1   ;expected result ROL +carry
rLSR                        ;expected result LSR & ROR -carry
rLSR                        ;expected result LSR & ROR -carry
rROR    db  $61,$41,$20,0   ; "
rROR    db  $61,$41,$20,0   ; "
Line 569... Line 687...
fROL    db  fnc,fc,fn,fz    ;no carry in
fROL    db  fnc,fc,fn,fz    ;no carry in
fROLc   db  fnc,fc,fn,0     ;carry in
fROLc   db  fnc,fc,fn,0     ;carry in
fLSR
fLSR
fROR    db  fc,0,fc,fz      ;no carry in
fROR    db  fc,0,fc,fz      ;no carry in
fRORc   db  fnc,fn,fnc,fn   ;carry in
fRORc   db  fnc,fn,fnc,fn   ;carry in
 
 
;increments (decrements)
;increments (decrements)
 
 
rINC    db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
rINC    db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
fINC    db  0,fn,fn,fz,0    ;expected flags for INC/DEC
fINC    db  0,fn,fn,fz,0    ;expected flags for INC/DEC
 
 
;logical memory operand
;logical memory operand
 
 
absOR   db  0,$1f,$71,$80   ;test pattern for OR
absOR   db  0,$1f,$71,$80   ;test pattern for OR
absAN   db  $0f,$ff,$7f,$80 ;test pattern for AND
absAN   db  $0f,$ff,$7f,$80 ;test pattern for AND
absEO   db  $ff,$0f,$8f,$8f ;test pattern for EOR
absEO   db  $ff,$0f,$8f,$8f ;test pattern for EOR
 
 
;logical accu operand
;logical accu operand
 
 
absORa  db  0,$f1,$1f,0     ;test pattern for OR
absORa  db  0,$f1,$1f,0     ;test pattern for OR
absANa  db  $f0,$ff,$ff,$ff ;test pattern for AND
absANa  db  $f0,$ff,$ff,$ff ;test pattern for AND
absEOa  db  $ff,$f0,$f0,$0f ;test pattern for EOR
absEOa  db  $ff,$f0,$f0,$0f ;test pattern for EOR
 
 
;logical results
;logical results
 
 
absrlo  db  0,$ff,$7f,$80
absrlo  db  0,$ff,$7f,$80
absflo  db  fz,fn,0,fn
absflo  db  fz,fn,0,fn
data_bss_end
 
 
 
 
data_bss_end
 
 
        code
        code
        org code_segment
        org code_segment
 
 
start   cld
start   cld
        lda #0          ;*** test 0 = initialize
        lda #0          ;*** test 0 = initialize
        sta test_case
        sta test_case
test_num = 0
test_num = 0
 
 
;stop interrupts before initializing BSS
;stop interrupts before initializing BSS
 
 
    if I_flag = 1
    if I_flag = 1
        sei
        sei
    endif
    endif
 
 
;initialize BSS segment
;initialize BSS segment
 
 
    if load_data_direct != 1
    if load_data_direct != 1
 
 
        ldx #zp_end-zp_init-1
        ldx #zp_end-zp_init-1
ld_zp   lda zp_init,x
ld_zp   lda zp_init,x
        sta zp_bss,x
        sta zp_bss,x
        dex
        dex
        bpl ld_zp
        bpl ld_zp
        ldx #data_end-data_init-1
        ldx #data_end-data_init-1
ld_data lda data_init,x
ld_data lda data_init,x
        sta data_bss,x
        sta data_bss,x
        dex
        dex
        bpl ld_data
        bpl ld_data
 
 
      if ROM_vectors = 1
      if ROM_vectors = 1
 
 
        ldx #5
        ldx #5
ld_vect lda vec_init,x
ld_vect lda vec_init,x
        sta vec_bss,x
        sta vec_bss,x
        dex
        dex
        bpl ld_vect
        bpl ld_vect
 
 
      endif
      endif
 
 
    endif
    endif
 
 
;retain status of interrupt flag
;retain status of interrupt flag
 
 
    if I_flag = 2
    if I_flag = 2
 
 
        php
        php
        pla
        pla
        and #4          ;isolate flag
        and #4          ;isolate flag
        sta flag_I_on   ;or mask
        sta flag_I_on   ;or mask
        eor #lo(~4)     ;reverse
        eor #lo(~4)     ;reverse
        sta flag_I_off  ;and mask
        sta flag_I_off  ;and mask
 
 
    endif
    endif
 
 
;generate checksum for RAM integrity test
;generate checksum for RAM integrity test
 
 
    if ram_top > -1
    if ram_top > -1
 
 
        lda #0
        lda #0
        sta zpt         ;set low byte of indirect pointer
        sta zpt         ;set low byte of indirect pointer
        sta ram_chksm+1 ;checksum high byte
        sta ram_chksm+1 ;checksum high byte
        sta range_adr   ;reset self modifying code
        sta range_adr   ;reset self modifying code
        sta tandi1
        sta tandi1
Line 667... Line 806...
        inx             ;advance RAM high address
        inx             ;advance RAM high address
        stx zpt+1
        stx zpt+1
        cpx #ram_top
        cpx #ram_top
        bne gcs5
        bne gcs5
        sta ram_chksm   ;checksum complete
        sta ram_chksm   ;checksum complete
 
 
    endif
    endif
 
 
    if skip_part_1 = 1
    if skip_part_1 = 1
 
 
        jmp  bin_test
        jmp  bin_test
 
 
    endif
    endif
 
 
        next_test
        next_test
 
 
;testing relative addressing with BEQ
;testing relative addressing with BEQ
 
 
        ldy #$fe        ;testing maximum range, not -1/-2 (invalid/self adr)
        ldy #$fe        ;testing maximum range, not -1/-2 (invalid/self adr)
range_loop
range_loop
        dey             ;next relative address
        dey             ;next relative address
        tya
        tya
        tax             ;precharge count to end of loop
        tax             ;precharge count to end of loop
Line 691... Line 834...
        sta range_adr   ;load into test target
        sta range_adr   ;load into test target
        lda #0          ;should set zero flag in status register
        lda #0          ;should set zero flag in status register
        jmp range_op
        jmp range_op
 
 
        ;relative address target field with branch under test in the middle
        ;relative address target field with branch under test in the middle
 
 
        dex             ;-128 - max backward
        dex             ;-128 - max backward
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex
Line 817... Line 961...
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex             ;-3
        dex             ;-3
 
 
range_op                ;test target with zero flag=0, z=1 if previous dex
range_op                ;test target with zero flag=0, z=1 if previous dex
range_adr   = *+1       ;modifiable relative address
range_adr   = *+1       ;modifiable relative address
 
 
        beq *+64        ;if called without modification
        beq *+64        ;if called without modification
        dex             ;+0
        dex             ;+0
        dex
        dex
        dex
        dex
        dex
        dex
Line 947... Line 1093...
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex
        dex
 
 
        beq range_ok    ;+127 - max forward
        beq range_ok    ;+127 - max forward
        trap            ; bad range
        trap            ; bad range
 
 
range_ok
range_ok
        cpy #0
        cpy #0
        beq range_end
        beq range_end
        jmp range_loop
        jmp range_loop
range_end               ;range test successful
range_end               ;range test successful
        next_test
        next_test
 
 
;partial test BNE & CMP, CPX, CPY immediate
;partial test BNE & CMP, CPX, CPY immediate
 
 
        cpy #1          ;testing BNE true
        cpy #1          ;testing BNE true
        bne test_bne
        bne test_bne
        trap
        trap
test_bne
test_bne
        lda #0
        lda #0
Line 989... Line 1138...
        cpy #1
        cpy #1
        trap_eq
        trap_eq
        trap_cs
        trap_cs
        trap_pl
        trap_pl
        next_test
        next_test
 
 
;testing stack operations PHA PHP PLA PLP
;testing stack operations PHA PHP PLA PLP
 
 
        ldx #$ff        ;initialize stack
        ldx #$ff        ;initialize stack
        txs
        txs
        lda #$55
        lda #$55
Line 1017... Line 1167...
        cpx #$ff        ;sp incremented?
        cpx #$ff        ;sp incremented?
        trap_ne
        trap_ne
        next_test
        next_test
 
 
;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
 
 
        set_stat $ff    ;all on
        set_stat $ff    ;all on
        bpl nbr1        ;branches should not be taken
        bpl nbr1        ;branches should not be taken
        bvc nbr2
        bvc nbr2
        bcc nbr3
        bcc nbr3
        bne nbr4
        bne nbr4
Line 1077... Line 1228...
        trap            ;previous beq taken
        trap            ;previous beq taken
br14    php
br14    php
        pla
        pla
        cmp_flag 0      ;flags off except break (pushed by sw) + reserved?
        cmp_flag 0      ;flags off except break (pushed by sw) + reserved?
        trap_ne
        trap_ne
 
 
        ;crosscheck flags
        ;crosscheck flags
 
 
        set_stat carry
        set_stat carry
        trap_cc
        trap_cc
        set_stat zero
        set_stat zero
        trap_ne
        trap_ne
        set_stat overfl
        set_stat overfl
Line 1097... Line 1250...
        set_stat $ff-minus
        set_stat $ff-minus
        trap_mi
        trap_mi
        next_test
        next_test
 
 
; test PHA does not alter flags or accumulator but PLA does
; test PHA does not alter flags or accumulator but PLA does
 
 
        ldx #$55        ;x & y protected
        ldx #$55        ;x & y protected
        ldy #$aa
        ldy #$aa
        set_a 1,$ff     ;push
        set_a 1,$ff     ;push
        pha
        pha
        tst_a 1,$ff
        tst_a 1,$ff
Line 1142... Line 1296...
        cpy #$aa
        cpy #$aa
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; partial pretest EOR #
; partial pretest EOR #
 
 
        set_a $3c,0
        set_a $3c,0
        eor #$c3
        eor #$c3
        tst_a $ff,fn
        tst_a $ff,fn
        set_a $c3,0
        set_a $c3,0
        eor #$c3
        eor #$c3
        tst_a 0,fz
        tst_a 0,fz
        next_test
        next_test
 
 
; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
; testing NOP
; testing NOP
 
 
        ldx #$24
        ldx #$24
        ldy #$42
        ldy #$42
        set_a $18,0
        set_a $18,0
        nop
        nop
        tst_a $18,0
        tst_a $18,0
Line 1173... Line 1329...
        cpy #$bd
        cpy #$bd
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; jump absolute
; jump absolute
 
 
        set_stat $0
        set_stat $0
        lda #'F'
        lda #'F'
        ldx #'A'
        ldx #'A'
        ldy #'R'        ;N=0, V=0, Z=0, C=0
        ldy #'R'        ;N=0, V=0, Z=0, C=0
        jmp test_far
        jmp test_far
Line 1219... Line 1376...
        cpy #'R'
        cpy #'R'
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; jump indirect
; jump indirect
 
 
        set_stat 0
        set_stat 0
        lda #'I'
        lda #'I'
        ldx #'N'
        ldx #'N'
        ldy #'D'        ;N=0, V=0, Z=0, C=0
        ldy #'D'        ;N=0, V=0, Z=0, C=0
        jmp (ptr_tst_ind)
        jmp (ptr_tst_ind)
Line 1250... Line 1408...
        cpx #$ff
        cpx #$ff
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; jump subroutine & return from subroutine
; jump subroutine & return from subroutine
 
 
        set_stat 0
        set_stat 0
        lda #'J'
        lda #'J'
        ldx #'S'
        ldx #'S'
        ldy #'R'        ;N=0, V=0, Z=0, C=0
        ldy #'R'        ;N=0, V=0, Z=0, C=0
        jsr test_jsr
        jsr test_jsr
Line 1277... Line 1436...
        cpx #$ff
        cpx #$ff
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; break & return from interrupt
; break & return from interrupt
 
 
    if ROM_vectors = 1
    if ROM_vectors = 1
 
 
        set_stat 0
        set_stat 0
        lda #'B'
        lda #'B'
        ldx #'R'
        ldx #'R'
        ldy #'K'        ;N=0, V=0, Z=0, C=0
        ldy #'K'        ;N=0, V=0, Z=0, C=0
        brk
        brk
 
 
    else
    else
        lda #hi brk_ret ;emulated break
 
 
        lda #hi(brk_ret) ;emulated break
        pha
        pha
        lda #lo brk_ret
        lda #lo(brk_ret-1) ; M65C02 pushes BRK+1 not BRK+2
        pha
        pha
        lda #fao        ;set break & unused on stack
        lda #fao        ;set break & unused on stack
        pha
        pha
        set_stat intdis
        set_stat intdis
        lda #'B'
        lda #'B'
        ldx #'R'
        ldx #'R'
        ldy #'K'        ;N=0, V=0, Z=0, C=0
        ldy #'K'        ;N=0, V=0, Z=0, C=0
        jmp irq_trap
        jmp irq_trap
 
 
    endif
    endif
 
 
        dey             ;should not be executed
        dey             ;should not be executed
brk_ret                 ;address of break return
brk_ret                 ;address of break return
        php             ;either SP or Y count will fail, if we do not hit
        php             ;either SP or Y count will fail, if we do not hit
        dey
        dey
        dey
        dey
Line 1317... Line 1482...
        cpx #$ff
        cpx #$ff
        trap_ne
        trap_ne
        next_test
        next_test
 
 
; test set and clear flags CLC CLI CLD CLV SEC SEI SED
; test set and clear flags CLC CLI CLD CLV SEC SEI SED
 
 
        set_stat $ff
        set_stat $ff
        clc
        clc
        tst_stat $ff-carry
        tst_stat $ff-carry
        sec
        sec
        tst_stat $ff
        tst_stat $ff
 
 
    if I_flag = 3
    if I_flag = 3
 
 
        cli
        cli
        tst_stat $ff-intdis
        tst_stat $ff-intdis
        sei
        sei
        tst_stat $ff
        tst_stat $ff
 
 
    endif
    endif
 
 
        cld
        cld
        tst_stat $ff-decmode
        tst_stat $ff-decmode
        sed
        sed
        tst_stat $ff
        tst_stat $ff
        clv
        clv
Line 1340... Line 1510...
        tst_stat 0
        tst_stat 0
        sec
        sec
        tst_stat carry
        tst_stat carry
        clc
        clc
        tst_stat 0
        tst_stat 0
 
 
    if I_flag = 3
    if I_flag = 3
 
 
        sei
        sei
        tst_stat intdis
        tst_stat intdis
        cli
        cli
        tst_stat 0
        tst_stat 0
 
 
    endif
    endif
 
 
        sed
        sed
        tst_stat decmode
        tst_stat decmode
        cld
        cld
        tst_stat 0
        tst_stat 0
        set_stat overfl
        set_stat overfl
        tst_stat overfl
        tst_stat overfl
        clv
        clv
        tst_stat 0
        tst_stat 0
        next_test
        next_test
 
 
; testing index register increment/decrement and transfer
; testing index register increment/decrement and transfer
; INX INY DEX DEY TAX TXA TAY TYA
; INX INY DEX DEY TAX TXA TAY TYA
 
 
        ldx #$fe
        ldx #$fe
        set_stat $ff
        set_stat $ff
        inx             ;ff
        inx             ;ff
        tst_x $ff,$ff-zero
        tst_x $ff,$ff-zero
        inx             ;00
        inx             ;00
Line 1544... Line 1720...
        tax
        tax
        tst_x $ff,minus
        tst_x $ff,minus
        next_test
        next_test
 
 
;TSX sets NZ - TXS does not
;TSX sets NZ - TXS does not
 
 
        ldx #1          ;01
        ldx #1          ;01
        set_stat $ff
        set_stat $ff
        txs
        txs
        php
        php
        lda $101
        lda $101
Line 1641... Line 1818...
        pla             ;sp=ff
        pla             ;sp=ff
        next_test
        next_test
 
 
; testing index register load & store LDY LDX STY STX all addressing modes
; testing index register load & store LDY LDX STY STX all addressing modes
; LDX / STX - zp,y / abs,y
; LDX / STX - zp,y / abs,y
 
 
        ldy #3
        ldy #3
tldx
tldx
        set_stat 0
        set_stat 0
        ldx zp1,y
        ldx zp1,y
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
Line 1741... Line 1919...
        dey
        dey
        bpl tstx
        bpl tstx
        next_test
        next_test
 
 
; indexed wraparound test (only zp should wrap)
; indexed wraparound test (only zp should wrap)
 
 
        ldy #3+$fa
        ldy #3+$fa
tldx4   ldx zp1-$fa&$ff,y   ;wrap on indexed zp
tldx4   ldx zp1-$fa&$ff,y   ;wrap on indexed zp
        txa
        txa
        sta abst-$fa,y      ;no STX abs,y!
        sta abst-$fa,y      ;no STX abs,y!
        dey
        dey
Line 1770... Line 1949...
        dey
        dey
        bpl tstx1
        bpl tstx1
        next_test
        next_test
 
 
; LDY / STY - zp,x / abs,x
; LDY / STY - zp,x / abs,x
 
 
        ldx #3
        ldx #3
tldy
tldy
        set_stat 0
        set_stat 0
        ldy zp1,x
        ldy zp1,x
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
Line 1870... Line 2050...
        dex
        dex
        bpl tsty
        bpl tsty
        next_test
        next_test
 
 
; indexed wraparound test (only zp should wrap)
; indexed wraparound test (only zp should wrap)
 
 
        ldx #3+$fa
        ldx #3+$fa
tldy4   ldy zp1-$fa&$ff,x   ;wrap on indexed zp
tldy4   ldy zp1-$fa&$ff,x   ;wrap on indexed zp
        tya
        tya
        sta abst-$fa,x      ;no STX abs,x!
        sta abst-$fa,x      ;no STX abs,x!
        dex
        dex
Line 1899... Line 2080...
        dex
        dex
        bpl tsty1
        bpl tsty1
        next_test
        next_test
 
 
; LDX / STX - zp / abs / #
; LDX / STX - zp / abs / #
 
 
        set_stat 0
        set_stat 0
        ldx zp1
        ldx zp1
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
        txa
        txa
        eor #$c3
        eor #$c3
Line 2289... Line 2471...
        trap_ne     ;store to abs data
        trap_ne     ;store to abs data
        stx abst+3  ;clear
        stx abst+3  ;clear
        next_test
        next_test
 
 
; LDY / STY - zp / abs / #
; LDY / STY - zp / abs / #
 
 
        set_stat 0
        set_stat 0
        ldy zp1
        ldy zp1
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
        tya
        tya
        eor #$c3
        eor #$c3
Line 2685... Line 2868...
        sty abst+3  ;clear
        sty abst+3  ;clear
        next_test
        next_test
 
 
; testing load / store accumulator LDA / STA all addressing modes
; testing load / store accumulator LDA / STA all addressing modes
; LDA / STA - zp,x / abs,x
; LDA / STA - zp,x / abs,x
 
 
        ldx #3
        ldx #3
tldax
tldax
        set_stat 0
        set_stat 0
        lda zp1,x
        lda zp1,x
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
Line 2779... Line 2963...
        dex
        dex
        bpl tstax
        bpl tstax
        next_test
        next_test
 
 
; LDA / STA - (zp),y / abs,y / (zp,x)
; LDA / STA - (zp),y / abs,y / (zp,x)
 
 
        ldy #3
        ldy #3
tlday
tlday
        set_stat 0
        set_stat 0
        lda (ind1),y
        lda (ind1),y
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
Line 2934... Line 3119...
        dey
        dey
        bpl tstay2
        bpl tstay2
        next_test
        next_test
 
 
; indexed wraparound test (only zp should wrap)
; indexed wraparound test (only zp should wrap)
 
 
        ldx #3+$fa
        ldx #3+$fa
tldax6  lda zp1-$fa&$ff,x   ;wrap on indexed zp
tldax6  lda zp1-$fa&$ff,x   ;wrap on indexed zp
        sta abst-$fa,x      ;no STX abs,x!
        sta abst-$fa,x      ;no STX abs,x!
        dex
        dex
        cpx #$fa
        cpx #$fa
Line 3017... Line 3203...
        dey
        dey
        bpl tstay6
        bpl tstay6
        next_test
        next_test
 
 
; LDA / STA - zp / abs / #
; LDA / STA - zp / abs / #
 
 
        set_stat 0
        set_stat 0
        lda zp1
        lda zp1
        php         ;test stores do not alter flags
        php         ;test stores do not alter flags
        eor #$c3
        eor #$c3
        plp
        plp
Line 3360... Line 3547...
        stx abst+3  ;clear
        stx abst+3  ;clear
        next_test
        next_test
 
 
; testing bit test & compares BIT CPX CPY CMP all addressing modes
; testing bit test & compares BIT CPX CPY CMP all addressing modes
; BIT - zp / abs
; BIT - zp / abs
 
 
        set_a $ff,0
        set_a $ff,0
        bit zp1+3   ;00 - should set Z / clear  NV
        bit zp1+3   ;00 - should set Z / clear  NV
        tst_a $ff,fz
        tst_a $ff,fz
        set_a 1,0
        set_a 1,0
        bit zp1+2   ;41 - should set V (M6) / clear NZ
        bit zp1+2   ;41 - should set V (M6) / clear NZ
Line 3414... Line 3602...
        bit abs1    ;c3 - should set N (M7) & V (M6) / clear Z
        bit abs1    ;c3 - should set N (M7) & V (M6) / clear Z
        tst_a 1,~fz
        tst_a 1,~fz
        next_test
        next_test
 
 
; CPX - zp / abs / #
; CPX - zp / abs / #
 
 
        set_x $80,0
        set_x $80,0
        cpx zp7f
        cpx zp7f
        tst_stat fc
        tst_stat fc
        dex
        dex
        cpx zp7f
        cpx zp7f
Line 3473... Line 3662...
        cpx #$7f
        cpx #$7f
        tst_x $7e,~fzc
        tst_x $7e,~fzc
        next_test
        next_test
 
 
; CPY - zp / abs / #
; CPY - zp / abs / #
 
 
        set_y $80,0
        set_y $80,0
        cpy zp7f
        cpy zp7f
        tst_stat fc
        tst_stat fc
        dey
        dey
        cpy zp7f
        cpy zp7f
Line 3532... Line 3722...
        cpy #$7f
        cpy #$7f
        tst_y $7e,~fzc
        tst_y $7e,~fzc
        next_test
        next_test
 
 
; CMP - zp / abs / #
; CMP - zp / abs / #
 
 
        set_a $80,0
        set_a $80,0
        cmp zp7f
        cmp zp7f
        tst_a $80,fc
        tst_a $80,fc
        set_a $7f,0
        set_a $7f,0
        cmp zp7f
        cmp zp7f
Line 3690... Line 3881...
        tst_a $7e,~fzc
        tst_a $7e,~fzc
        next_test
        next_test
 
 
; testing shifts - ASL LSR ROL ROR all addressing modes
; testing shifts - ASL LSR ROL ROR all addressing modes
; shifts - accumulator
; shifts - accumulator
 
 
        ldx #3
        ldx #3
tasl
tasl
        set_ax zp1,0
        set_ax zp1,0
        asl a
        asl a
        tst_ax rASL,fASL,0
        tst_ax rASL,fASL,0
Line 3782... Line 3974...
        dex
        dex
        bpl trorc1
        bpl trorc1
        next_test
        next_test
 
 
; shifts - zeropage
; shifts - zeropage
 
 
        ldx #3
        ldx #3
tasl2
tasl2
        set_z zp1,0
        set_z zp1,0
        asl zpt
        asl zpt
        tst_z rASL,fASL,0
        tst_z rASL,fASL,0
Line 3874... Line 4067...
        dex
        dex
        bpl trorc3
        bpl trorc3
        next_test
        next_test
 
 
; shifts - absolute
; shifts - absolute
 
 
        ldx #3
        ldx #3
tasl4
tasl4
        set_abs zp1,0
        set_abs zp1,0
        asl abst
        asl abst
        tst_abs rASL,fASL,0
        tst_abs rASL,fASL,0
Line 3966... Line 4160...
        dex
        dex
        bpl trorc5
        bpl trorc5
        next_test
        next_test
 
 
; shifts - zp indexed
; shifts - zp indexed
 
 
        ldx #3
        ldx #3
tasl6
tasl6
        set_zx zp1,0
        set_zx zp1,0
        asl zpt,x
        asl zpt,x
        tst_zx rASL,fASL,0
        tst_zx rASL,fASL,0
Line 4058... Line 4253...
        dex
        dex
        bpl trorc7
        bpl trorc7
        next_test
        next_test
 
 
; shifts - abs indexed
; shifts - abs indexed
 
 
        ldx #3
        ldx #3
tasl8
tasl8
        set_absx zp1,0
        set_absx zp1,0
        asl abst,x
        asl abst,x
        tst_absx rASL,fASL,0
        tst_absx rASL,fASL,0
Line 4151... Line 4347...
        bpl trorc9
        bpl trorc9
        next_test
        next_test
 
 
; testing memory increment/decrement - INC DEC all addressing modes
; testing memory increment/decrement - INC DEC all addressing modes
; zeropage
; zeropage
 
 
        ldx #0
        ldx #0
        lda #$7e
        lda #$7e
        sta zpt
        sta zpt
tinc
tinc
        set_stat 0
        set_stat 0
Line 4210... Line 4407...
        bne tdec10
        bne tdec10
tdec11
tdec11
        next_test
        next_test
 
 
; absolute memory
; absolute memory
 
 
        ldx #0
        ldx #0
        lda #$7e
        lda #$7e
        sta abst
        sta abst
tinc2
tinc2
        set_stat 0
        set_stat 0
Line 4269... Line 4467...
        bne tdec12
        bne tdec12
tdec13
tdec13
        next_test
        next_test
 
 
; zeropage indexed
; zeropage indexed
 
 
        ldx #0
        ldx #0
        lda #$7e
        lda #$7e
tinc4   sta zpt,x
tinc4   sta zpt,x
        set_stat 0
        set_stat 0
        inc zpt,x
        inc zpt,x
Line 4326... Line 4525...
        bne tdec14
        bne tdec14
tdec15
tdec15
        next_test
        next_test
 
 
; memory indexed
; memory indexed
 
 
        ldx #0
        ldx #0
        lda #$7e
        lda #$7e
tinc6   sta abst,x
tinc6   sta abst,x
        set_stat 0
        set_stat 0
        inc abst,x
        inc abst,x
Line 4384... Line 4584...
tdec17
tdec17
        next_test
        next_test
 
 
; testing logical instructions - AND EOR ORA all addressing modes
; testing logical instructions - AND EOR ORA all addressing modes
; AND
; AND
 
 
        ldx #3      ;immediate - self modifying code
        ldx #3      ;immediate - self modifying code
tand    lda zpAN,x
tand    lda zpAN,x
        sta tandi1
        sta tandi1
        set_ax  absANa,0
        set_ax  absANa,0
tandi1  equ *+1     ;target for immediate operand
tandi1  equ *+1     ;target for immediate operand
Line 4520... Line 4721...
        dey
        dey
        bpl tand15
        bpl tand15
        next_test
        next_test
 
 
; EOR
; EOR
 
 
        ldx #3      ;immediate - self modifying code
        ldx #3      ;immediate - self modifying code
teor    lda zpEO,x
teor    lda zpEO,x
        sta teori1
        sta teori1
        set_ax  absEOa,0
        set_ax  absEOa,0
teori1  equ *+1     ;target for immediate operand
teori1  equ *+1     ;target for immediate operand
Line 4656... Line 4858...
        dey
        dey
        bpl teor15
        bpl teor15
        next_test
        next_test
 
 
; OR
; OR
 
 
        ldx #3      ;immediate - self modifying code
        ldx #3      ;immediate - self modifying code
tora    lda zpOR,x
tora    lda zpOR,x
        sta torai1
        sta torai1
        set_ax  absORa,0
        set_ax  absORa,0
torai1  equ *+1     ;target for immediate operand
torai1  equ *+1     ;target for immediate operand
Line 4789... Line 4992...
        set_ay  absORa,$ff
        set_ay  absORa,$ff
        ora (indOR),y
        ora (indOR),y
        tst_ay  absrlo,absflo,$ff-fnz
        tst_ay  absrlo,absflo,$ff-fnz
        dey
        dey
        bpl tora15
        bpl tora15
 
 
    if I_flag = 3
    if I_flag = 3
 
 
        cli
        cli
 
 
    endif
    endif
 
 
bin_test
bin_test
    if skip_bin_test = 1
    if skip_bin_test = 1
 
 
        jmp dec_test
        jmp dec_test
 
 
    else
    else
 
 
        lda #test_num
        lda #test_num
        sta test_case
        sta test_case
 
 
    endif
    endif
 
 
        next_test
        next_test
 
 
 
 
; full binary add/subtract test
; full binary add/subtract test
; iterates through all combinations of operands and carry input
; iterates through all combinations of operands and carry input
; uses increments/decrements to predict result & result flags
; uses increments/decrements to predict result & result flags
 
 
        cld
        cld
        ldx #ad2        ;for indexed test
        ldx #ad2        ;for indexed test
        ldy #$ff        ;max range
        ldy #$ff        ;max range
        lda #0          ;start with adding zeroes & no carry
        lda #0          ;start with adding zeroes & no carry
        sta adfc        ;carry in - for diag
        sta adfc        ;carry in - for diag
Line 4855... Line 5065...
        lda ad2
        lda ad2
        sta adrl
        sta adrl
        bne tadd        ;iterate op2
        bne tadd        ;iterate op2
 
 
dec_test
dec_test
 
 
    if skip_dec_test = 1
    if skip_dec_test = 1
        jmp success
 
 
        success
 
 
    else
    else
 
 
        lda #test_num
        lda #test_num
        sta test_case
        sta test_case
 
 
    endif
    endif
 
 
        next_test
        next_test
 
 
; decimal add/subtract test
; decimal add/subtract test
; *** WARNING - tests documented behavior only! ***
; *** WARNING - tests documented behavior only! ***
;   only valid BCD operands are tested, N V Z flags are ignored
;   only valid BCD operands are tested, N V Z flags are ignored
; iterates through all valid combinations of operands and carry input
; iterates through all valid combinations of operands and carry input
; uses increments/decrements to predict result & carry flag
; uses increments/decrements to predict result & carry flag
 
 
        sed
        sed
        ldx #ad2        ;for indexed test
        ldx #ad2        ;for indexed test
        ldy #$ff        ;max range
        ldy #$ff        ;max range
        lda #$99        ;start with adding 99 to 99 with carry
        lda #$99        ;start with adding 99 to 99 with carry
        sta ad1         ;operand 1 - accumulator
        sta ad1         ;operand 1 - accumulator
Line 4953... Line 5169...
        trap_ne         ;test is out of sequence
        trap_ne         ;test is out of sequence
 
 
; final RAM integrity test
; final RAM integrity test
;   verifies that none of the previous tests has altered RAM outside of the
;   verifies that none of the previous tests has altered RAM outside of the
;   designated write areas.
;   designated write areas.
 
 
        check_ram
        check_ram
 
 
; *** DEBUG INFO ***
; *** DEBUG INFO ***
 
;
; to debug checksum errors uncomment check_ram in the next_test macro to
; to debug checksum errors uncomment check_ram in the next_test macro to
; narrow down the responsible opcode.
; narrow down the responsible opcode.
; may give false errors when monitor, OS or other background activity is
; may give false errors when monitor, OS or other background activity is
; allowed during previous tests.
; allowed during previous tests.
 
 
 
 
 
 
; S U C C E S S ************************************************
; S U C C E S S ************************************************
; -------------
; -------------
success jmp start       ;if you get here everything went well
 
 
;success    jmp start       ;if you get here everything went well
 
            success
; -------------
; -------------
; S U C C E S S ************************************************
; S U C C E S S ************************************************
 
 
; core subroutine of the decimal add/subtract test
; core subroutine of the decimal add/subtract test
 
;
; *** WARNING - tests documented behavior only! ***
; *** WARNING - tests documented behavior only! ***
;   only valid BCD operands are tested, N V Z flags are ignored
;   only valid BCD operands are tested, N V Z flags are ignored
; iterates through all valid combinations of operands and carry input
; iterates through all valid combinations of operands and carry input
; uses increments/decrements to predict result & carry flag
; uses increments/decrements to predict result & carry flag
 
 
chkdad
chkdad
 
 
; decimal ADC / SBC zp
; decimal ADC / SBC zp
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ad2         ;perform add
        adc ad2         ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 4997... Line 5220...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; decimal ADC / SBC abs
; decimal ADC / SBC abs
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2        ;perform add
        adc ada2        ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5020... Line 5245...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC #
; decimal ADC / SBC #
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad2
        lda ad2
        sta chkdadi     ;self modify immediate
        sta chkdadi     ;self modify immediate
        lda ad1
        lda ad1
 
 
chkdadi = * + 1         ;operand of the immediate ADC
chkdadi = * + 1         ;operand of the immediate ADC
 
 
        adc #0          ;perform add
        adc #0          ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
        trap_ne         ;bad result
        trap_ne         ;bad result
        pla             ;check flags
        pla             ;check flags
Line 5039... Line 5268...
        plp
        plp
        php             ;save carry for next add
        php             ;save carry for next add
        lda sb2
        lda sb2
        sta chkdsbi     ;self modify immediate
        sta chkdsbi     ;self modify immediate
        lda ad1
        lda ad1
 
 
chkdsbi = * + 1         ;operand of the immediate SBC
chkdsbi = * + 1         ;operand of the immediate SBC
 
 
        sbc #0          ;perform subtract
        sbc #0          ;perform subtract
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
        trap_ne         ;bad result
        trap_ne         ;bad result
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC zp,x
; decimal ADC / SBC zp,x
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc 0,x         ;perform add
        adc 0,x         ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5072... Line 5305...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC abs,x
; decimal ADC / SBC abs,x
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2-ad2,x  ;perform add
        adc ada2-ad2,x  ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5095... Line 5330...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC abs,y
; decimal ADC / SBC abs,y
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2-$ff,y  ;perform add
        adc ada2-$ff,y  ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5118... Line 5355...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC (zp,x)
; decimal ADC / SBC (zp,x)
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc (lo adi2-ad2,x) ;perform add
        adc (lo adi2-ad2,x) ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5141... Line 5380...
        pla             ;check flags
        pla             ;check flags
        and #1          ;mask carry
        and #1          ;mask carry
        cmp adrh
        cmp adrh
        trap_ne         ;bad carry
        trap_ne         ;bad carry
        plp
        plp
 
 
; decimal ADC / SBC (abs),y
; decimal ADC / SBC (abs),y
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc (adiy2),y   ;perform add
        adc (adiy2),y   ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5169... Line 5410...
        rts
        rts
 
 
; core subroutine of the full binary add/subtract test
; core subroutine of the full binary add/subtract test
; iterates through all combinations of operands and carry input
; iterates through all combinations of operands and carry input
; uses increments/decrements to predict result & result flags
; uses increments/decrements to predict result & result flags
 
 
chkadd  lda adrf        ;add V-flag if overflow
chkadd  lda adrf        ;add V-flag if overflow
        and #$83        ;keep N-----ZC / clear V
        and #$83        ;keep N-----ZC / clear V
        pha
        pha
        lda ad1         ;test sign unequal between operands
        lda ad1         ;test sign unequal between operands
        eor ad2
        eor ad2
Line 5183... Line 5425...
        pla
        pla
        ora #$40        ;set V
        ora #$40        ;set V
        pha
        pha
ckad1   pla
ckad1   pla
        sta adrf        ;save expected flags
        sta adrf        ;save expected flags
 
 
; binary ADC / SBC zp
; binary ADC / SBC zp
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ad2         ;perform add
        adc ad2         ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5206... Line 5450...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC abs
; binary ADC / SBC abs
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2        ;perform add
        adc ada2        ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5229... Line 5475...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC #
; binary ADC / SBC #
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad2
        lda ad2
        sta chkadi      ;self modify immediate
        sta chkadi      ;self modify immediate
        lda ad1
        lda ad1
 
 
chkadi  = * + 1         ;operand of the immediate ADC
chkadi  = * + 1         ;operand of the immediate ADC
 
 
        adc #0          ;perform add
        adc #0          ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
        trap_ne         ;bad result
        trap_ne         ;bad result
        pla             ;check flags
        pla             ;check flags
Line 5248... Line 5498...
        plp
        plp
        php             ;save carry for next add
        php             ;save carry for next add
        lda sb2
        lda sb2
        sta chksbi      ;self modify immediate
        sta chksbi      ;self modify immediate
        lda ad1
        lda ad1
 
 
chksbi  = * + 1         ;operand of the immediate SBC
chksbi  = * + 1         ;operand of the immediate SBC
 
 
        sbc #0          ;perform subtract
        sbc #0          ;perform subtract
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
        trap_ne         ;bad result
        trap_ne         ;bad result
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC zp,x
; binary ADC / SBC zp,x
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc 0,x         ;perform add
        adc 0,x         ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5281... Line 5535...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC abs,x
; binary ADC / SBC abs,x
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2-ad2,x  ;perform add
        adc ada2-ad2,x  ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5304... Line 5560...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC abs,y
; binary ADC / SBC abs,y
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc ada2-$ff,y  ;perform add
        adc ada2-$ff,y  ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5327... Line 5585...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC (zp,x)
; binary ADC / SBC (zp,x)
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc (lo adi2-ad2,x) ;perform add
        adc (lo adi2-ad2,x) ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5350... Line 5610...
        pla             ;check flags
        pla             ;check flags
        and #$c3        ;mask NV----ZC
        and #$c3        ;mask NV----ZC
        cmp adrf
        cmp adrf
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
 
 
; binary ADC / SBC (abs),y
; binary ADC / SBC (abs),y
 
 
        php             ;save carry for subtract
        php             ;save carry for subtract
        lda ad1
        lda ad1
        adc (adiy2),y   ;perform add
        adc (adiy2),y   ;perform add
        php
        php
        cmp adrl        ;check result
        cmp adrl        ;check result
Line 5376... Line 5638...
        trap_ne         ;bad flags
        trap_ne         ;bad flags
        plp
        plp
        rts
        rts
 
 
; target for the jump absolute test
; target for the jump absolute test
 
 
        dey
        dey
        dey
        dey
test_far
test_far
        php             ;either SP or Y count will fail, if we do not hit
        php             ;either SP or Y count will fail, if we do not hit
        dey
        dey
Line 5409... Line 5672...
        inx             ;return registers with modifications
        inx             ;return registers with modifications
        eor #$aa        ;N=1, V=1, Z=0, C=1
        eor #$aa        ;N=1, V=1, Z=0, C=1
        jmp far_ret
        jmp far_ret
 
 
; target for the jump indirect test
; target for the jump indirect test
 
 
        align
        align
 
 
ptr_tst_ind dw test_ind
ptr_tst_ind dw test_ind
ptr_ind_ret dw ind_ret
ptr_ind_ret dw ind_ret
 
 
        trap            ;runover protection
        trap            ;runover protection
        dey
        dey
        dey
        dey
test_ind
test_ind
        php             ;either SP or Y count will fail, if we do not hit
        php             ;either SP or Y count will fail, if we do not hit
Line 5447... Line 5713...
        eor #$aa        ;N=1, V=1, Z=0, C=1
        eor #$aa        ;N=1, V=1, Z=0, C=1
        jmp (ptr_ind_ret)
        jmp (ptr_ind_ret)
        trap            ;runover protection
        trap            ;runover protection
 
 
; target for the jump subroutine test
; target for the jump subroutine test
 
 
        dey
        dey
        dey
        dey
test_jsr
test_jsr
        php             ;either SP or Y count will fail, if we do not hit
        php             ;either SP or Y count will fail, if we do not hit
        dey
        dey
Line 5487... Line 5754...
        eor #$aa        ;N=1, V=1, Z=0, C=1
        eor #$aa        ;N=1, V=1, Z=0, C=1
        rts
        rts
        trap            ;runover protection
        trap            ;runover protection
 
 
;trap in case of unexpected IRQ, NMI, BRK, RESET - BRK test target
;trap in case of unexpected IRQ, NMI, BRK, RESET - BRK test target
 
 
nmi_trap
nmi_trap
        trap            ;check stack for conditions at NMI
        trap            ;check stack for conditions at NMI
res_trap
res_trap
        trap            ;unexpected RESET
        trap            ;unexpected RESET
 
 
Line 5499... Line 5767...
irq_trap                ;BRK test or unextpected BRK or IRQ
irq_trap                ;BRK test or unextpected BRK or IRQ
        php             ;either SP or Y count will fail, if we do not hit
        php             ;either SP or Y count will fail, if we do not hit
        dey
        dey
        dey
        dey
        dey
        dey
 
 
        ;next 4 traps could be caused by unexpected BRK or IRQ
        ;next 4 traps could be caused by unexpected BRK or IRQ
        ;check stack for BREAK and originating location
        ;check stack for BREAK and originating location
        ;possible jump/branch into weeds (uninitialized space)
        ;possible jump/branch into weeds (uninitialized space)
 
 
        cmp #'B'        ;registers loaded?
        cmp #'B'        ;registers loaded?
        trap_ne
        trap_ne
        cpx #'R'
        cpx #'R'
        trap_ne
        trap_ne
        cpy #('K'-3)
        cpy #('K'-3)
Line 5536... Line 5806...
        eor #$aa        ;N=1, V=1, Z=0, C=1 but original flags should be restored
        eor #$aa        ;N=1, V=1, Z=0, C=1 but original flags should be restored
        rti
        rti
        trap            ;runover protection
        trap            ;runover protection
 
 
;copy of data to initialize BSS segment
;copy of data to initialize BSS segment
 
 
    if load_data_direct != 1
    if load_data_direct != 1
 
 
zp_init
zp_init
zp1_    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
zp1_    db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
zp7f_   db  $7f             ;test pattern for compare
zp7f_   db  $7f             ;test pattern for compare
 
 
;logical zeropage operands
;logical zeropage operands
 
 
zpOR_   db  0,$1f,$71,$80   ;test pattern for OR
zpOR_   db  0,$1f,$71,$80   ;test pattern for OR
zpAN_   db  $0f,$ff,$7f,$80 ;test pattern for AND
zpAN_   db  $0f,$ff,$7f,$80 ;test pattern for AND
zpEO_   db  $ff,$0f,$8f,$8f ;test pattern for EOR
zpEO_   db  $ff,$0f,$8f,$8f ;test pattern for EOR
 
 
;indirect addressing pointers
;indirect addressing pointers
 
 
ind1_   dw  abs1            ;indirect pointer to pattern in absolute memory
ind1_   dw  abs1            ;indirect pointer to pattern in absolute memory
        dw  abs1+1
        dw  abs1+1
        dw  abs1+2
        dw  abs1+2
        dw  abs1+3
        dw  abs1+3
        dw  abs7f
        dw  abs7f
Line 5568... Line 5844...
        dw  absEO+3
        dw  absEO+3
indOR_  dw  absOR           ;indirect pointer to OR pattern in absolute memory
indOR_  dw  absOR           ;indirect pointer to OR pattern in absolute memory
        dw  absOR+1
        dw  absOR+1
        dw  absOR+2
        dw  absOR+2
        dw  absOR+3
        dw  absOR+3
 
 
;add/subtract indirect pointers
;add/subtract indirect pointers
 
 
adi2_   dw  ada2            ;indirect pointer to operand 2 in absolute memory
adi2_   dw  ada2            ;indirect pointer to operand 2 in absolute memory
sbi2_   dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
sbi2_   dw  sba2            ;indirect pointer to complemented operand 2 (SBC)
adiy2_  dw  ada2-$ff        ;with offset for indirect indexed
adiy2_  dw  ada2-$ff        ;with offset for indirect indexed
sbiy2_  dw  sba2-$ff
sbiy2_  dw  sba2-$ff
zp_end
zp_end
 
 
    if (zp_end - zp_init) != (zp_bss_end - zp_bss)
    if (zp_end - zp_init) != (zp_bss_end - zp_bss)
 
 
        ;force assembler error if size is different
        ;force assembler error if size is different
        ERROR ERROR ERROR   ;mismatch between bss and zeropage data
        ERROR ERROR ERROR   ;mismatch between bss and zeropage data
 
 
    endif
    endif
 
 
data_init
data_init
abs1_   db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
abs1_   db  $c3,$82,$41,0   ;test patterns for LDx BIT ROL ROR ASL LSR
abs7f_  db  $7f             ;test pattern for compare
abs7f_  db  $7f             ;test pattern for compare
 
 
;loads
;loads
 
 
fLDx_   db  fn,fn,0,fz      ;expected flags for load
fLDx_   db  fn,fn,0,fz      ;expected flags for load
 
 
;shifts
;shifts
 
 
rASL_                       ;expected result ASL & ROL -carry
rASL_                       ;expected result ASL & ROL -carry
rROL_   db  $86,$04,$82,0   ; "
rROL_   db  $86,$04,$82,0   ; "
rROLc_  db  $87,$05,$83,1   ;expected result ROL +carry
rROLc_  db  $87,$05,$83,1   ;expected result ROL +carry
rLSR_                       ;expected result LSR & ROR -carry
rLSR_                       ;expected result LSR & ROR -carry
rROR_   db  $61,$41,$20,0   ; "
rROR_   db  $61,$41,$20,0   ; "
Line 5596... Line 5882...
fROL_   db  fnc,fc,fn,fz    ;no carry in
fROL_   db  fnc,fc,fn,fz    ;no carry in
fROLc_  db  fnc,fc,fn,0     ;carry in
fROLc_  db  fnc,fc,fn,0     ;carry in
fLSR_
fLSR_
fROR_   db  fc,0,fc,fz      ;no carry in
fROR_   db  fc,0,fc,fz      ;no carry in
fRORc_  db  fnc,fn,fnc,fn   ;carry in
fRORc_  db  fnc,fn,fnc,fn   ;carry in
 
 
;increments (decrements)
;increments (decrements)
 
 
rINC_   db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
rINC_   db  $7f,$80,$ff,0,1 ;expected result for INC/DEC
fINC_   db  0,fn,fn,fz,0    ;expected flags for INC/DEC
fINC_   db  0,fn,fn,fz,0    ;expected flags for INC/DEC
 
 
;logical memory operand
;logical memory operand
 
 
absOR_  db  0,$1f,$71,$80   ;test pattern for OR
absOR_  db  0,$1f,$71,$80   ;test pattern for OR
absAN_  db  $0f,$ff,$7f,$80 ;test pattern for AND
absAN_  db  $0f,$ff,$7f,$80 ;test pattern for AND
absEO_  db  $ff,$0f,$8f,$8f ;test pattern for EOR
absEO_  db  $ff,$0f,$8f,$8f ;test pattern for EOR
 
 
;logical accu operand
;logical accu operand
 
 
absORa_ db  0,$f1,$1f,0     ;test pattern for OR
absORa_ db  0,$f1,$1f,0     ;test pattern for OR
absANa_ db  $f0,$ff,$ff,$ff ;test pattern for AND
absANa_ db  $f0,$ff,$ff,$ff ;test pattern for AND
absEOa_ db  $ff,$f0,$f0,$0f ;test pattern for EOR
absEOa_ db  $ff,$f0,$f0,$0f ;test pattern for EOR
 
 
;logical results
;logical results
 
 
absrlo_ db  0,$ff,$7f,$80
absrlo_ db  0,$ff,$7f,$80
absflo_ db  fz,fn,0,fn
absflo_ db  fz,fn,0,fn
 
 
data_end
data_end
 
 
    if (data_end - data_init) != (data_bss_end - data_bss)
    if (data_end - data_init) != (data_bss_end - data_bss)
 
 
        ;force assembler error if size is different
        ;force assembler error if size is different
        ERROR ERROR ERROR   ;mismatch between bss and data
        ERROR ERROR ERROR   ;mismatch between bss and data
    endif
 
 
 
 
    endif
 
        code
 
        org $3FFA
vec_init
vec_init
        dw  nmi_trap
        dw  nmi_trap
        dw  res_trap
        dw  res_trap
        dw  irq_trap
        dw  irq_trap
vec_bss equ $fffa
vec_bss equ $fffa
 
 
    endif                   ;end of RAM init data
    endif                   ;end of RAM init data
 
 
    if (load_data_direct = 1) & (ROM_vectors = 1)
    if (load_data_direct = 1) & (ROM_vectors = 1)
 
 
        org $fffa       ;vectors
        org $fffa       ;vectors
 
 
        dw  nmi_trap
        dw  nmi_trap
        dw  res_trap
        dw  res_trap
        dw  irq_trap
        dw  irq_trap
    endif
 
 
 
 
    endif
        end start
        end start
 
 
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