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-- $Id: output.vhdl,v 1.2 2005-12-23 04:27:00 arif_endro Exp $
-- ------------------------------------------------------------------------
-------------------------------------------------------------------------------
 
-- Title       : Output
 
-- Project     : Mini AES 128 
 
-------------------------------------------------------------------------------
 
-- File        : output.vhdl
 
-- Author      : "Arif E. Nugroho" <arif_endro@yahoo.com>
 
-- Created     : 2005/12/03
 
-- Last update : 
 
-- Simulators  : ModelSim SE PLUS 6.0
 
-- Synthesizers: ISE Xilinx 6.3i
 
-- Target      : 
 
-------------------------------------------------------------------------------
 
-- Description : Output file to analize and record output of test bench.
 
-------------------------------------------------------------------------------
 
-- Copyright (C) 2005 Arif Endro Nugroho
-- Copyright (C) 2005 Arif Endro Nugroho
-------------------------------------------------------------------------------
-- All rights reserved.
-- 
-- 
--         THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
-- Redistribution and use in source and binary forms, with or without
-- PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
-- modification, are permitted provided that the following conditions
-- ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE
-- are met:
-- ASSOCIATED DISCLAIMER.
 
-- 
-- 
-------------------------------------------------------------------------------
-- 1. Redistributions of source code must retain the above copyright
 
--    notice, this list of conditions and the following disclaimer.
 
-- 2. Redistributions in binary form must reproduce the above copyright
 
--    notice, this list of conditions and the following disclaimer in the
 
--    documentation and/or other materials provided with the distribution.
 
-- 3. The name of Arif Endro Nugroho may not be used to endorse or promote
 
--    products derived from this software without specific prior written
 
--    permission.
-- 
-- 
--         THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-- THIS SOFTWARE IS PROVIDED BY ARIF ENDRO NUGROHO "AS IS" AND ANY EXPRESS
-- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-- OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO
-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-- EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-- DISCLAIMED. IN NO EVENT SHALL ARIF ENDRO NUGROHO BE LIABLE FOR ANY
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-- PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-- OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-- WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-- OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 
-- POSSIBILITY OF SUCH DAMAGE.
-- 
-- 
-------------------------------------------------------------------------------
-- End Of License.
 
-- ------------------------------------------------------------------------
 
 
library ieee;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_textio.all;
use ieee.std_logic_textio.all;

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