Line 52... |
Line 52... |
use ieee.std_logic_arith.all;
|
use ieee.std_logic_arith.all;
|
use ieee.std_logic_unsigned.all;
|
use ieee.std_logic_unsigned.all;
|
|
|
library mod_sim_exp;
|
library mod_sim_exp;
|
use mod_sim_exp.std_functions.all;
|
use mod_sim_exp.std_functions.all;
|
|
use mod_sim_exp.mod_sim_exp_pkg.all;
|
|
|
-- structural description of a RAM to hold the modulus, with
|
-- structural description of a RAM to hold the modulus, with
|
-- adjustable width (64, 128, 256, 512, 576, 640,..) and depth(nr of moduluses)
|
-- adjustable width (64, 128, 256, 512, 576, 640,..) and depth(nr of moduluses)
|
-- formula for available widths: (i*512+(0 or 64 or 128 or 256)) (i=integer number)
|
-- formula for available widths: (i*512+(0 or 64 or 128 or 256)) (i=integer number)
|
--
|
--
|
Line 125... |
Line 126... |
ramblocks_full : for i in 0 to nrRAMblocks_full generate
|
ramblocks_full : for i in 0 to nrRAMblocks_full generate
|
-- write port signal
|
-- write port signal
|
waddr <= modulus_in_sel & modulus_addr(log2(RAMblock_maxwidth/32)-1 downto 0);
|
waddr <= modulus_in_sel & modulus_addr(log2(RAMblock_maxwidth/32)-1 downto 0);
|
|
|
full_ones : if (i < nrRAMblocks_full) generate
|
full_ones : if (i < nrRAMblocks_full) generate
|
ramblock_full : entity mod_sim_exp.dpramblock_asym
|
ramblock_full : dpramblock_asym
|
generic map(
|
generic map(
|
width => RAMblock_maxwidth,
|
width => RAMblock_maxwidth,
|
depth => depth,
|
depth => depth,
|
device => device
|
device => device
|
)
|
)
|