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The SPI and especially the GPIO interfaces might be the most straightforward approaches since they
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The SPI and especially the GPIO interfaces might be the most straightforward approaches since they
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have a minimal protocol overhead. Device-specific interrupt capabilities could be added using the
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have a minimal protocol overhead. Device-specific interrupt capabilities could be added using the
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https://stnolting.github.io/neorv32/#_external_interrupt_controller_xirq[External Interrupt Controller (XIRQ)].
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https://stnolting.github.io/neorv32/#_external_interrupt_controller_xirq[External Interrupt Controller (XIRQ)].
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Beyond simplicity, these interface only provide a very limited bandwidth and require more sophisticated
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Beyond simplicity, these interface only provide a very limited bandwidth and require more sophisticated
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software handling ("bit-banging" for the GPIO). Hence, i is not recommend to use them for _chip-internal_ communication.
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software handling ("bit-banging" for the GPIO). Hence, it is not recommend to use them for _chip-internal_ communication.
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=== External Bus Interface
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=== External Bus Interface
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The https://stnolting.github.io/neorv32/#_processor_external_memory_interface_wishbone_axi4_lite[External Bus Interface]
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The https://stnolting.github.io/neorv32/#_processor_external_memory_interface_wishbone_axi4_lite[External Bus Interface]
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This allows a very simple still high-bandwidth communications. However, high bus traffic may increase access latencies.
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This allows a very simple still high-bandwidth communications. However, high bus traffic may increase access latencies.
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=== Stream Link Interface
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=== Stream Link Interface
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The https://stnolting.github.io/neorv32/#_stream_link_interface_slink[Stream Link Interface (SLINK)] provides a
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The link:++https://stnolting.github.io/neorv32/#_stream_link_interface_slink++[Stream Link Interface (SLINK)] provides a
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point-to-point, unidirectional and parallel data interface that can be used to transfer _streaming_ data. In
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point-to-point, unidirectional and parallel data interface that can be used to transfer _streaming_ data. In
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contrast to the external bus interface, the streaming interface does not provide any kind of advanced control,
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contrast to the external bus interface, the streaming interface does not provide any kind of advanced control,
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so it can be seen as "constant address bursts" where data is transmitted _sequentially_ (no random accesses).
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so it can be seen as "constant address bursts" where data is transmitted _sequentially_ (no random accesses).
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While the CPU needs to "feed" the stream link interfaces with data (and read back incoming data), the actual
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While the CPU needs to "feed" the stream link interfaces with data (and read back incoming data), the actual
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processor-external processing of the data run independently of the CPU.
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processor-external processing of the data run independently of the CPU.
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