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-- # (c) "AvalonMM", "NIOS-2", "Qsys", "MegaWizard" and "Platform Designer" #
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-- # (c) "AvalonMM", "NIOS-2", "Qsys", "MegaWizard" and "Platform Designer" #
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-- # are trademarks of Intel #
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-- # are trademarks of Intel #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
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-- # BSD 3-Clause License #
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-- # #
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-- # #
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-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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-- # #
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-- # #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # permitted provided that the following conditions are met: #
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-- # permitted provided that the following conditions are met: #
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-- # #
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-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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| Line 123... |
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IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
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IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
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IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
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IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
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IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits
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IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits
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IO_NEOLED_EN : boolean := false; -- implement NeoPixel-compatible smart LED interface (NEOLED)?
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IO_NEOLED_EN : boolean := false; -- implement NeoPixel-compatible smart LED interface (NEOLED)?
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IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two
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IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two
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IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)?
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IO_GPTMR_EN : boolean := false; -- implement general purpose timer (GPTMR)?
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IO_XIP_EN : boolean := false -- implement execute in place module (XIP)?
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);
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);
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port (
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port (
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-- Global control --
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-- Global control --
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clk_i : in std_ulogic; -- global clock, rising edge
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clk_i : in std_ulogic; -- global clock, rising edge
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rstn_i : in std_ulogic; -- global reset, low-active, async
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rstn_i : in std_ulogic; -- global reset, low-active, async
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| Line 150... |
Line 151... |
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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fence_o : out std_ulogic; -- indicates an executed FENCE operation
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fence_o : out std_ulogic; -- indicates an executed FENCE operation
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fencei_o : out std_ulogic; -- indicates an executed FENCEI operation
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fencei_o : out std_ulogic; -- indicates an executed FENCEI operation
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-- XIP (execute in place via SPI) signals (available if IO_XIP_EN = true) --
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xip_csn_o : out std_ulogic; -- chip-select, low-active
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xip_clk_o : out std_ulogic; -- serial clock
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xip_sdi_i : in std_ulogic := 'L'; -- device data input
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xip_sdo_o : out std_ulogic; -- controller data output
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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slink_tx_dat_o : out sdata_8x32_t; -- output data
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slink_tx_dat_o : out sdata_8x32_t; -- output data
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slink_tx_val_o : out std_ulogic_vector(7 downto 0); -- valid output
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slink_tx_val_o : out std_ulogic_vector(7 downto 0); -- valid output
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slink_tx_rdy_i : in std_ulogic_vector(7 downto 0) := (others => 'L'); -- ready to send
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slink_tx_rdy_i : in std_ulogic_vector(7 downto 0) := (others => 'L'); -- ready to send
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-- TWI (available if IO_TWI_EN = true) --
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-- TWI (available if IO_TWI_EN = true) --
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twi_sda_io : inout std_logic := 'U'; -- twi serial data line
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twi_sda_io : inout std_logic := 'U'; -- twi serial data line
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twi_scl_io : inout std_logic := 'U'; -- twi serial clock line
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twi_scl_io : inout std_logic := 'U'; -- twi serial clock line
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-- PWM (available if IO_PWM_NUM_CH > 0) --
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-- PWM (available if IO_PWM_NUM_CH > 0) --
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pwm_o : out std_ulogic_vector(IO_PWM_NUM_CH-1 downto 0); -- pwm channels
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pwm_o : out std_ulogic_vector(59 downto 0); -- pwm channels
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-- Custom Functions Subsystem IO (available if IO_CFS_EN = true) --
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-- Custom Functions Subsystem IO (available if IO_CFS_EN = true) --
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cfs_in_i : in std_ulogic_vector(IO_CFS_IN_SIZE-1 downto 0) := (others => 'U'); -- custom CFS inputs conduit
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cfs_in_i : in std_ulogic_vector(IO_CFS_IN_SIZE-1 downto 0) := (others => 'U'); -- custom CFS inputs conduit
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cfs_out_o : out std_ulogic_vector(IO_CFS_OUT_SIZE-1 downto 0); -- custom CFS outputs conduit
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cfs_out_o : out std_ulogic_vector(IO_CFS_OUT_SIZE-1 downto 0); -- custom CFS outputs conduit
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-- System time --
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-- System time --
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mtime_i : in std_ulogic_vector(63 downto 0) := (others => 'U'); -- current system time from ext. MTIME (if IO_MTIME_EN = false)
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mtime_i : in std_ulogic_vector(63 downto 0) := (others => 'U'); -- current system time from ext. MTIME (if IO_MTIME_EN = false)
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mtime_o : out std_ulogic_vector(63 downto 0); -- current system time from int. MTIME (if IO_MTIME_EN = true)
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mtime_o : out std_ulogic_vector(63 downto 0); -- current system time from int. MTIME (if IO_MTIME_EN = true)
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-- External platform interrupts (available if XIRQ_NUM_CH > 0) --
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-- External platform interrupts (available if XIRQ_NUM_CH > 0) --
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xirq_i : in std_ulogic_vector(XIRQ_NUM_CH-1 downto 0) := (others => 'L'); -- IRQ channels
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xirq_i : in std_ulogic_vector(31 downto 0) := (others => 'L'); -- IRQ channels
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-- CPU interrupts --
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-- CPU interrupts --
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mtime_irq_i : in std_ulogic := 'L'; -- machine timer interrupt, available if IO_MTIME_EN = false
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mtime_irq_i : in std_ulogic := 'L'; -- machine timer interrupt, available if IO_MTIME_EN = false
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msw_irq_i : in std_ulogic := 'L'; -- machine software interrupt
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msw_irq_i : in std_ulogic := 'L'; -- machine software interrupt
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mext_irq_i : in std_ulogic := 'L' -- machine external interrupt
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mext_irq_i : in std_ulogic := 'L' -- machine external interrupt
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IO_CFS_CONFIG => IO_CFS_CONFIG,
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IO_CFS_CONFIG => IO_CFS_CONFIG,
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IO_CFS_IN_SIZE => IO_CFS_IN_SIZE,
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IO_CFS_IN_SIZE => IO_CFS_IN_SIZE,
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IO_CFS_OUT_SIZE => IO_CFS_OUT_SIZE,
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IO_CFS_OUT_SIZE => IO_CFS_OUT_SIZE,
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IO_NEOLED_EN => IO_NEOLED_EN,
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IO_NEOLED_EN => IO_NEOLED_EN,
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IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO,
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IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO,
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IO_GPTMR_EN => IO_GPTMR_EN
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IO_GPTMR_EN => IO_GPTMR_EN,
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IO_XIP_EN => IO_XIP_EN
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)
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)
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port map (
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port map (
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-- Global control --
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-- Global control --
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clk_i => clk_i,
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clk_i => clk_i,
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rstn_i => rstn_i,
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rstn_i => rstn_i,
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Line 356... |
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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fence_o => fence_o,
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fence_o => fence_o,
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fencei_o => fencei_o,
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fencei_o => fencei_o,
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-- XIP (execute in place via SPI) signals (available if IO_XIP_EN = true) --
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xip_csn_o => xip_csn_o,
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xip_clk_o => xip_clk_o,
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xip_sdi_i => xip_sdi_i,
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xip_sdo_o => xip_sdo_o,
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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slink_tx_dat_o => slink_tx_dat_o,
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slink_tx_dat_o => slink_tx_dat_o,
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slink_tx_val_o => slink_tx_val_o,
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slink_tx_val_o => slink_tx_val_o,
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slink_tx_rdy_i => slink_tx_rdy_i,
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slink_tx_rdy_i => slink_tx_rdy_i,
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