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constant ext_mem_a_latency_c : natural := 8; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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constant ext_mem_a_latency_c : natural := 8; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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-- simulated external Wishbone memory B (can be used as external DMEM) --
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-- simulated external Wishbone memory B (can be used as external DMEM) --
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constant ext_mem_b_base_addr_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- wishbone memory base address (external DMEM base)
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constant ext_mem_b_base_addr_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- wishbone memory base address (external DMEM base)
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constant ext_mem_b_size_c : natural := dmem_size_c; -- wishbone memory size in bytes
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constant ext_mem_b_size_c : natural := dmem_size_c; -- wishbone memory size in bytes
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constant ext_mem_b_latency_c : natural := 8; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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constant ext_mem_b_latency_c : natural := 8; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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-- simulated external Wishbone memory C (can be used as external IO) --
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-- simulated external Wishbone memory C (can be used to simulate external IO access) --
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constant ext_mem_c_base_addr_c : std_ulogic_vector(31 downto 0) := x"F0000000"; -- wishbone memory base address (default begin of EXTERNAL IO area)
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constant ext_mem_c_base_addr_c : std_ulogic_vector(31 downto 0) := x"F0000000"; -- wishbone memory base address (default begin of EXTERNAL IO area)
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constant ext_mem_c_size_c : natural := 64; -- wishbone memory size in bytes
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constant ext_mem_c_size_c : natural := 64; -- wishbone memory size in bytes
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constant ext_mem_c_latency_c : natural := 3; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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constant ext_mem_c_latency_c : natural := 3; -- latency in clock cycles (min 1, max 255), plus 1 cycle initial delay
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-- simulation interrupt trigger --
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-- simulation interrupt trigger --
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constant irq_trigger_c : std_ulogic_vector(31 downto 0) := x"FF000000";
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constant irq_trigger_c : std_ulogic_vector(31 downto 0) := x"FF000000";
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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TINY_SHIFT_EN => false, -- use tiny (single-bit) shifter for shift operations
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CPU_CNT_WIDTH => 64, -- total width of CPU cycle and instret counters (0..64)
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-- Physical Memory Protection (PMP) --
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-- Physical Memory Protection (PMP) --
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PMP_NUM_REGIONS => 4, -- number of regions (0..64)
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PMP_NUM_REGIONS => 4, -- number of regions (0..64)
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PMP_MIN_GRANULARITY => 64*1024, -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
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PMP_MIN_GRANULARITY => 64*1024, -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
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-- Hardware Performance Monitors (HPM) --
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-- Hardware Performance Monitors (HPM) --
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HPM_NUM_CNTS => 12, -- number of inmplemnted HPM counters (0..29)
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HPM_NUM_CNTS => 12, -- number of inmplemnted HPM counters (0..29)
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HPM_CNT_WIDTH => 40, -- total size of HPM counters (1..64)
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-- Internal Instruction memory --
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-- Internal Instruction memory --
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MEM_INT_IMEM_EN => int_imem_c , -- implement processor-internal instruction memory
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MEM_INT_IMEM_EN => int_imem_c , -- implement processor-internal instruction memory
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MEM_INT_IMEM_SIZE => imem_size_c, -- size of processor-internal instruction memory in bytes
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MEM_INT_IMEM_SIZE => imem_size_c, -- size of processor-internal instruction memory in bytes
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MEM_INT_IMEM_ROM => false, -- implement processor-internal instruction memory as ROM
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MEM_INT_IMEM_ROM => false, -- implement processor-internal instruction memory as ROM
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-- Internal Data memory --
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-- Internal Data memory --
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