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[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_spi.c] - Diff between revs 66 and 70

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// #################################################################################################
// #################################################################################################
// # << NEORV32: neorv32_spi.c - Serial Peripheral Interface Controller (SPI) HW Driver >>         #
// # << NEORV32: neorv32_spi.c - Serial Peripheral Interface Controller (SPI) HW Driver >>         #
// # ********************************************************************************************* #
// # ********************************************************************************************* #
// # BSD 3-Clause License                                                                          #
// # BSD 3-Clause License                                                                          #
// #                                                                                               #
// #                                                                                               #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved.                                     #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved.                                     #
// #                                                                                               #
// #                                                                                               #
// # Redistribution and use in source and binary forms, with or without modification, are          #
// # Redistribution and use in source and binary forms, with or without modification, are          #
// # permitted provided that the following conditions are met:                                     #
// # permitted provided that the following conditions are met:                                     #
// #                                                                                               #
// #                                                                                               #
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
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  NEORV32_SPI.CTRL |= ((uint32_t)(1 << SPI_CTRL_EN));
  NEORV32_SPI.CTRL |= ((uint32_t)(1 << SPI_CTRL_EN));
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 
 * Enable high-speed SPI mode (running at half of the processor clock).
 
 *
 
 * @note High-speed SPI mode ignores the programmed clock prescaler configuration.
 
 **************************************************************************/
 
void neorv32_spi_highspeed_enable(void) {
 
 
 
  NEORV32_SPI.CTRL |= 1 << SPI_CTRL_HIGHSPEED;
 
}
 
 
 
 
 
/**********************************************************************//**
 
 * Disable high-speed SPI mode.
 
 *
 
 * @note High-speed SPI mode ignores the programmed clock prescaler configuration.
 
 **************************************************************************/
 
void neorv32_spi_highspeed_disable(void) {
 
 
 
  NEORV32_SPI.CTRL &= ~(1 << SPI_CTRL_HIGHSPEED);
 
}
 
 
 
 
 
/**********************************************************************//**
 * Activate SPI chip select signal.
 * Activate SPI chip select signal.
 *
 *
 * @note The chip select output lines are LOW when activated.
 * @note The chip select output lines are LOW when activated.
 *
 *
 * @param cs Chip select line to activate (0..7).
 * @param cs Chip select line to activate (0..7).

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