| Line 29... |
Line 29... |
|
|
input rst, //reset
|
input rst, //reset
|
input clk,
|
input clk,
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|
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input platform_ready, //the underlying physical platform is
|
input platform_ready, //the underlying physical platform is
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output reg platform_error, //Underlyaing physal platform received an error, this should probably be a reset
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output reg linkup, //link is finished
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output reg linkup, //link is finished
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output reg tx_comm_reset, //send a init OOB signal
|
output reg tx_comm_reset, //send a init OOB signal
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output reg tx_comm_wake, //send a wake OOB signal
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output reg tx_comm_wake, //send a wake OOB signal
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input tx_oob_complete, //Phy has said we are finished with this OOB transaction
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input comm_init_detect, //detected an init
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input comm_init_detect, //detected an init
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input comm_wake_detect, //detected a wake on the rx lines
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input comm_wake_detect, //detected a wake on the rx lines
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input [31:0] rx_din,
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input [31:0] rx_din,
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input [3:0] rx_isk,
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input [3:0] rx_is_k,
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input rx_is_elec_idle,
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input rx_is_elec_idle,
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input rx_byte_is_aligned,
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input rx_byte_is_aligned,
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input phy_error,
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output reg [31:0] tx_dout,
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output reg [31:0] tx_dout,
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output reg tx_isk,
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output reg tx_is_k,
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output reg tx_set_elec_idle,
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output reg tx_set_elec_idle,
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output [3:0] lax_state
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output [3:0] lax_state
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|
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|
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);
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);
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| Line 63... |
Line 66... |
parameter WAIT_FOR_NO_INIT = 4'h3;
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parameter WAIT_FOR_NO_INIT = 4'h3;
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parameter WAIT_FOR_CONFIGURE_END = 4'h4;
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parameter WAIT_FOR_CONFIGURE_END = 4'h4;
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parameter SEND_WAKE = 4'h5;
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parameter SEND_WAKE = 4'h5;
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parameter WAIT_FOR_WAKE = 4'h6;
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parameter WAIT_FOR_WAKE = 4'h6;
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parameter WAIT_FOR_NO_WAKE = 4'h7;
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parameter WAIT_FOR_NO_WAKE = 4'h7;
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parameter WAIT_FOR_ALIGN = 4'h8;
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parameter WAIT_FOR_IDLE = 4'h8;
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parameter SEND_ALIGN = 4'h9;
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parameter WAIT_FOR_ALIGN = 4'h9;
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parameter DETECT_SYNC = 4'hA;
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parameter SEND_ALIGN = 4'hA;
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parameter READY = 4'hB;
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parameter DETECT_SYNC = 4'hB;
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parameter READY = 4'hC;
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//Registers/Wires
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//Registers/Wires
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reg [3:0] state;
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reg [3:0] state;
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reg [31:0] timer;
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reg [31:0] timer;
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reg [1:0] no_align_count;
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reg [1:0] no_align_count;
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reg [3:0] retries;
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//timer used to send 'INITs', WAKEs' and read them
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//timer used to send 'INITs', WAKEs' and read them
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wire timeout;
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wire timeout;
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wire align_detected;
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wire align_detected;
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wire sync_detected;
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wire sync_detected;
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//Submodules
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//Submodules
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//Asynchronous Logic
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//Asynchronous Logic
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assign timeout = (timer == 0);
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assign timeout = (timer == 0);
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assign align_detected = ((rx_isk > 0) && (rx_din == `PRIM_ALIGN) && rx_byte_is_aligned);
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//assign align_detected = ((rx_is_k > 0) && (rx_din == `PRIM_ALIGN) && !phy_error);
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assign sync_detected = ((rx_isk > 0) && (rx_din == `PRIM_SYNC));
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//assign align_detected = ((rx_is_k > 0) && (rx_din == `PRIM_ALIGN));
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assign align_detected = ((rx_is_k > 0) && (rx_din == `PRIM_ALIGN) && rx_byte_is_aligned);
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assign sync_detected = ((rx_is_k > 0) && (rx_din == `PRIM_SYNC));
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assign lax_state = state;
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assign lax_state = state;
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//Synchronous Logic
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//Synchronous Logic
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initial begin
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initial begin
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tx_set_elec_idle <= 1;
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tx_set_elec_idle <= 1;
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| Line 95... |
Line 102... |
always @ (posedge clk) begin
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always @ (posedge clk) begin
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if (rst) begin
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if (rst) begin
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state <= IDLE;
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state <= IDLE;
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linkup <= 0;
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linkup <= 0;
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timer <= 0;
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timer <= 0;
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tx_comm_reset <= 1;
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tx_comm_reset <= 0;
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tx_comm_wake <= 0;
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tx_comm_wake <= 0;
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tx_dout <= 0;
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tx_dout <= 0;
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tx_isk <= 0;
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tx_is_k <= 0;
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tx_set_elec_idle <= 1;
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tx_set_elec_idle <= 1;
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no_align_count <= 0;
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no_align_count <= 0;
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platform_error <= 0;
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retries <= 0;
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end
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end
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else begin
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else begin
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//to support strobes, continuously reset the following signals
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//to support strobes, continuously reset the following signals
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tx_comm_reset <= 0;
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tx_comm_reset <= 0;
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tx_comm_wake <= 0;
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tx_comm_wake <= 0;
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tx_isk <= 0;
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tx_is_k <= 0;
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|
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//timer (when reache 0 timeout has occured)
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//timer (when reache 0 timeout has occured)
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if (timer > 0) begin
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if (timer > 0) begin
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timer <= timer - 1;
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timer <= timer - 1;
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end
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end
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|
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//main state machine, if this reaches ready an initialization sequence has completed
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//main state machine, if this reaches ready an initialization sequence has completed
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case (state)
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case (state)
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IDLE: begin
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IDLE: begin
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platform_error <= 0;
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linkup <= 0;
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linkup <= 0;
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tx_set_elec_idle <= 1;
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tx_set_elec_idle <= 1;
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if (platform_ready) begin
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if (platform_ready) begin
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$display ("oob_controller: send RESET");
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$display ("oob_controller: send RESET");
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//the platform is ready
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//the platform is ready
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// PLL has locked onto a clock
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// PLL has locked onto a clock
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// DCM has generated the correct clocks
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// DCM has generated the correct clocks
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timer <= 32'h000000A2;
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timer <= 32'h000000A2;
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state <= SEND_RESET;
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state <= SEND_RESET;
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tx_comm_reset <= 1;
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end
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end
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end
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end
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SEND_RESET: begin
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SEND_RESET: begin
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//XXX: In the groundhog COMM RESET was continuously issued for a long period of time
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//XXX: In the groundhog COMM RESET was continuously issued for a long period of time
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//send the INIT sequence, this will initiate a communication with the
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//send the INIT sequence, this will initiate a communication with the
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//SATA hard drive, or reset it so that it can be initiated to state
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//SATA hard drive, or reset it so that it can be initiated to state
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|
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//strobe the comm init so that the platform will send an INIT OOB signal
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//strobe the comm init so that the platform will send an INIT OOB signal
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tx_comm_reset <= 1;
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if (timeout || tx_oob_complete) begin
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if (timeout) begin
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timer <= `INITIALIZE_TIMEOUT;
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timer <= 32'd`INITIALIZE_TIMEOUT;
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state <= WAIT_FOR_INIT;
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state <= WAIT_FOR_INIT;
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$display ("oob_controller: wait for INIT");
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$display ("oob_controller: wait for INIT");
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end
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end
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end
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end
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WAIT_FOR_INIT: begin
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WAIT_FOR_INIT: begin
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//wait for a response from the SATA harddrive, if the timeout occurs
|
//wait for a response from the SATA harddrive, if the timeout occurs
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//go back to the SEND_RESET state
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//go back to the SEND_RESET state
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if (comm_init_detect) begin
|
if (comm_init_detect) begin
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//HD said 'sup' go to a wake
|
//HD said 'sup' go to a wake
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timer <= 0;
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//timer <= 0;
|
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timer <= 32'h00001000;
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state <= WAIT_FOR_NO_INIT;
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state <= WAIT_FOR_NO_INIT;
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$display ("oob_controller: wait for INIT to go low");
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$display ("oob_controller: wait for INIT to go low");
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end
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end
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if (timeout) begin
|
if (timeout) begin
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$display ("oob_controller: timed out while waiting for INIT");
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$display ("oob_controller: timed out while waiting for INIT");
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state <= IDLE;
|
state <= IDLE;
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end
|
end
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end
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end
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WAIT_FOR_NO_INIT: begin
|
WAIT_FOR_NO_INIT: begin
|
//wait for the init signal to go low from the device
|
//wait for the init signal to go low from the device
|
if (!comm_init_detect) begin
|
if (!comm_init_detect && (timeout || tx_oob_complete)) begin
|
$display ("oob_controller: INIT deasserted");
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$display ("oob_controller: INIT deasserted");
|
$display ("oob_controller: start configuration");
|
$display ("oob_controller: start configuration");
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state <= WAIT_FOR_CONFIGURE_END;
|
state <= WAIT_FOR_CONFIGURE_END;
|
end
|
end
|
end
|
end
|
WAIT_FOR_CONFIGURE_END: begin
|
WAIT_FOR_CONFIGURE_END: begin
|
$display ("oob_controller: System is configured");
|
$display ("oob_controller: System is configured");
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state <= SEND_WAKE;
|
state <= SEND_WAKE;
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timer <= 32'h0000009B;
|
timer <= 32'h0000009B;
|
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tx_comm_wake <= 1;
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//end
|
//end
|
end
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end
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SEND_WAKE: begin
|
SEND_WAKE: begin
|
//XXX: In the groundhog COMM WAKE was continuously send for a long period of time
|
//XXX: In the groundhog COMM WAKE was continuously send for a long period of time
|
//Send the WAKE sequence to the hard drive to initiate a wakeup sequence
|
//Send the WAKE sequence to the hard drive to initiate a wakeup sequence
|
tx_comm_wake <= 1;
|
|
//XXX: Is this timeout correct?
|
//XXX: Is this timeout correct?
|
//880uS
|
//880uS
|
if (timeout) begin
|
if (timeout || tx_oob_complete) begin
|
//timer <= 32'd`INITIALIZE_TIMEOUT;
|
//timer <= 32'd`INITIALIZE_TIMEOUT;
|
timer <= 32'h000203AD;
|
timer <= 32'h000203AD;
|
state <= WAIT_FOR_WAKE;
|
state <= WAIT_FOR_WAKE;
|
end
|
end
|
end
|
end
|
| Line 204... |
Line 215... |
//XXX: Is this timeout correct?
|
//XXX: Is this timeout correct?
|
//880uS
|
//880uS
|
$display ("oob_controller: detected WAKE deasserted");
|
$display ("oob_controller: detected WAKE deasserted");
|
$display ("oob_controller: Send Dialtone, wait for ALIGN");
|
$display ("oob_controller: Send Dialtone, wait for ALIGN");
|
//Going to add more timeout
|
//Going to add more timeout
|
timer <= 32'h203AD;
|
//timer <= 32'h0203AD;
|
|
timer <= 32'h0203AD;
|
state <= WAIT_FOR_ALIGN;
|
state <= WAIT_FOR_ALIGN;
|
|
//state <= WAIT_FOR_IDLE;
|
|
retries <= 4;
|
end
|
end
|
end
|
end
|
|
/*
|
|
WAIT_FOR_IDLE: begin
|
|
if (!rx_is_elec_idle) begin
|
|
state <= WAIT_FOR_ALIGN;
|
|
timer <= 32'h0101D0;
|
|
end
|
|
else if (timeout) begin
|
|
if (retries > 0) begin
|
|
timer <= 32'h0203AD;
|
|
retries <= retries - 1;
|
|
end
|
|
if (retries == 0) begin
|
|
state <= IDLE;
|
|
end
|
|
end
|
|
end
|
|
*/
|
WAIT_FOR_ALIGN: begin
|
WAIT_FOR_ALIGN: begin
|
//transmit the 'dialtone' continuously
|
//transmit the 'dialtone' continuously
|
//since we need to start sending actual data (not OOB signals, get out
|
//since we need to start sending actual data (not OOB signals, get out
|
// of tx idle)
|
// of tx idle)
|
tx_set_elec_idle <= 0;
|
tx_set_elec_idle <= 0;
|
//a sequence of 0's and 1's
|
//a sequence of 0's and 1's
|
tx_dout <= `DIALTONE;
|
tx_dout <= `DIALTONE;
|
tx_isk <= 0;
|
tx_is_k <= 0;
|
|
//$display ("rx din: %h, k: %h", rx_din, rx_is_k);
|
if (align_detected) begin
|
if (align_detected) begin
|
//we got something from the device!
|
//we got something from the device!
|
timer <= 0;
|
timer <= 0;
|
//now send an align from my side
|
//now send an align from my side
|
state <= SEND_ALIGN;
|
state <= SEND_ALIGN;
|
| Line 233... |
Line 265... |
state <= IDLE;
|
state <= IDLE;
|
end
|
end
|
end
|
end
|
SEND_ALIGN: begin
|
SEND_ALIGN: begin
|
tx_dout <= `PRIM_ALIGN;
|
tx_dout <= `PRIM_ALIGN;
|
tx_isk <= 1;
|
tx_is_k <= 1;
|
if (!align_detected) begin
|
if (!align_detected) begin
|
$display ("oob_controller: detected ALIGN deasserted");
|
$display ("oob_controller: detected ALIGN deasserted");
|
//XXX: Groundhog detects the SYNC primitve before declaring linkup
|
//XXX: Groundhog detects the SYNC primitve before declaring linkup
|
if (no_align_count == 3) begin
|
if (no_align_count == 3) begin
|
$display ("oob_controller: ready");
|
$display ("oob_controller: ready");
|
state <= READY;
|
state <= READY;
|
end
|
end
|
else begin
|
else begin
|
no_align_count <= no_align_count + 1;
|
no_align_count <= no_align_count + 2'b01;
|
end
|
end
|
end
|
end
|
end
|
end
|
DETECT_SYNC: begin
|
DETECT_SYNC: begin
|
if (sync_detected) begin
|
if (sync_detected) begin
|
state <= READY;
|
state <= READY;
|
end
|
end
|
end
|
end
|
READY: begin
|
READY: begin
|
linkup <= 1;
|
linkup <= 1;
|
|
/*
|
|
if (phy_error) begin
|
|
platform_error <= 1;
|
|
end
|
|
*/
|
if (comm_init_detect) begin
|
if (comm_init_detect) begin
|
state <= IDLE;
|
state <= IDLE;
|
end
|
end
|
end
|
end
|
default: begin
|
default: begin
|
