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https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
[/] [oms8051mini/] [trunk/] [rtl/] [spi/] [spi_cfg.v] - Diff between revs 11 and 34
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| Rev 11 |
Rev 34 |
| Line 233... |
Line 233... |
// Individual register assignments
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// Individual register assignments
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//-----------------------------------------------------------------------
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//-----------------------------------------------------------------------
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// Logic for Register 0 : SPI Control Register
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// Logic for Register 0 : SPI Control Register
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//-----------------------------------------------------------------------
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//-----------------------------------------------------------------------
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wire cfg_op_req = spi_ctrl[31]; // cpu request
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wire cfg_op_req = spi_ctrl[31]; // cpu request
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wire [1:0] cfg_tgt_sel = spi_ctrl[24:23]; // target chip select
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wire [1:0] cfg_tgt_sel = spi_ctrl[29:28]; // target chip select
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wire [1:0] cfg_op_type = spi_ctrl[22:21]; // SPI operation type
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wire [1:0] cfg_op_type = spi_ctrl[27:26]; // SPI operation type
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wire [1:0] cfg_transfer_size = spi_ctrl[20:19]; // SPI transfer size
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wire [1:0] cfg_transfer_size = spi_ctrl[25:24]; // SPI transfer size
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wire [5:0] cfg_sck_period = spi_ctrl[18:13]; // sck clock period
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wire [5:0] cfg_sck_period = spi_ctrl[21:16]; // sck clock period
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wire [4:0] cfg_sck_cs_period = spi_ctrl[12:8]; // cs setup/hold period
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wire [4:0] cfg_sck_cs_period = spi_ctrl[12:8]; // cs setup/hold period
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wire [7:0] cfg_cs_byte = spi_ctrl[7:0]; // cs bit information
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wire [7:0] cfg_cs_byte = spi_ctrl[7:0]; // cs bit information
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generic_register #(8,0 ) u_spi_ctrl_be0 (
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generic_register #(8,0 ) u_spi_ctrl_be0 (
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