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[/] [oms8051mini/] [trunk/] [rtl/] [spi/] [spi_ctl.v] - Diff between revs 2 and 36

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Rev 2 Rev 36
Line 12... Line 12...
////    nothing                                                   ////
////    nothing                                                   ////
////                                                              ////
////                                                              ////
////  Author(s):                                                  ////
////  Author(s):                                                  ////
////      - Dinesh Annayya, dinesha@opencores.org                 ////
////      - Dinesh Annayya, dinesha@opencores.org                 ////
////                                                              ////
////                                                              ////
////  Revision : Nov 26, 2016                                      //// 
//////////////////////////////////////////////////////////////////////
////                                                              ////
////  Revision : 
 
////     v-0.0 : Nov 26, 2016
 
////       A. Initial Version                                     
 
////     v-0.1 : Jan 19, 2017
 
////       A. Lint warning fixes 
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
////                                                              ////
////                                                              ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////
////                                                              ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// This source file may be used and distributed without         ////
Line 192... Line 196...
      cs_int_n    <= 1'b1;
      cs_int_n    <= 1'b1;
      sck_out_en  <= 1'b0;
      sck_out_en  <= 1'b0;
      shift_enb   <= 1'b0;
      shift_enb   <= 1'b0;
      cfg_dataout <= 32'h0;
      cfg_dataout <= 32'h0;
      load_byte   <= 1'b0;
      load_byte   <= 1'b0;
 
      op_done     <= 0;
   end
   end
   else begin
   else begin
      if(sck_ne)
      if(sck_ne)
         sck_cnt <=  clr_sck_cnt  ? 6'h0 : sck_cnt + 1 ;
         sck_cnt <=  clr_sck_cnt  ? 6'h0 : sck_cnt + 1 ;
 
 
Line 303... Line 308...
      end // case: `SPI_CS_HLD    
      end // case: `SPI_CS_HLD    
      `SPI_WAIT : begin
      `SPI_WAIT : begin
          if(!cfg_op_req) // Wait for Request de-assertion
          if(!cfg_op_req) // Wait for Request de-assertion
             spiif_cs <= `SPI_IDLE;
             spiif_cs <= `SPI_IDLE;
       end
       end
 
       default: spiif_cs    <= `SPI_IDLE;
 
 
    endcase // casex(spiif_cs)
    endcase // casex(spiif_cs)
   end
   end
end // always @(sck_ne
end // always @(sck_ne
 
 
endmodule
endmodule

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