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https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
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Rev 7 |
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Line 357... |
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assign reg_3[31:0] = {30'h0,rx_fifo_empty,tx_fifo_full};
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assign reg_3[31:0] = {30'h0,rx_fifo_empty,tx_fifo_full};
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// reg_4 is tx_fifo wr
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// reg_4 is tx_fifo wr
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assign tx_fifo_wr_en = sw_wr_en_4;
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assign tx_fifo_wr_en = sw_wr_en_4 & reg_ack;
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assign tx_fifo_data = reg_wdata[7:0];
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assign tx_fifo_data = reg_wdata[7:0];
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// reg_5 is rx_fifo read
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// reg_5 is rx_fifo read
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// rx_fifo read data
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// rx_fifo read data
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assign reg_5[31:0] = {24'h0,rx_fifo_data};
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assign reg_5[31:0] = {24'h0,rx_fifo_data};
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assign rx_fifo_rd_en = sw_rd_en_5;
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assign rx_fifo_rd_en = sw_rd_en_5 & reg_ack;
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endmodule
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endmodule
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