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https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
[/] [oms8051mini/] [trunk/] [rtl/] [uart/] [uart_txfsm.v] - Diff between revs 6 and 36
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Rev 36 |
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//// nothing ////
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//// nothing ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// - Dinesh Annayya, dinesha@opencores.org ////
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//// ////
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//// ////
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//// Revision : ////
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//// v-0.0 : Nov 26, 2016 ////
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//// 1. Initial version picked from ////
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//// http://www.opencores.org/cores/turbo8051/ ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// Revision :
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//// v0.0 : Nov 26, 2016
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//// 1. Initial version picked from
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//// http://www.opencores.org/cores/turbo8051/
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//// v0.1 : Jan 19, 2017
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//// 1. Lint fixes for case statement //////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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Line 161... |
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xfr_stop_st2 : begin // Second Stop Bit
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xfr_stop_st2 : begin // Second Stop Bit
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so <= 1;
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so <= 1;
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txstate <= idle_st;
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txstate <= idle_st;
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end
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end
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default: txstate <= idle_st;
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endcase
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endcase
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end
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end
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else begin
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else begin
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fifo_rd <= 1'b0;
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fifo_rd <= 1'b0;
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end
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end
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