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process (currentCpuState)
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process (currentCpuState)
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variable cyclesExecute : integer range 0 to 20; -- Cycles to wait while executing instruction
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variable cyclesExecute : integer range 0 to 20; -- Cycles to wait while executing instruction
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variable opcodeIR : std_logic_vector(5 downto 0);
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variable opcodeIR : std_logic_vector(5 downto 0);
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variable operand_reg1 : std_logic_vector(3 downto 0);
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variable operand_reg1 : std_logic_vector(3 downto 0);
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variable operand_imm : std_logic_vector(21 downto 0);
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variable operand_imm : std_logic_vector(21 downto 0);
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variable accDp : std_logic_vector(n downto 0); -- Value stored from DataPath
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begin
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begin
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opcodeIR := IR((IR'HIGH) downto (IR'HIGH - 5));
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opcodeIR := IR((IR'HIGH) downto (IR'HIGH - 5));
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operand_reg1 := IR((IR'HIGH - 6) downto (IR'HIGH - 9)); -- 4 bits register operand1 (Max 16 registers)
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operand_reg1 := IR((IR'HIGH - 6) downto (IR'HIGH - 9)); -- 4 bits register operand1 (Max 16 registers)
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operand_imm := IR((IR'HIGH - 10) downto (IR'LOW)); -- 22 bits imediate value (Max value 4194304)
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operand_imm := IR((IR'HIGH - 10) downto (IR'LOW)); -- 22 bits imediate value (Max value 4194304)
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case currentCpuState is
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case currentCpuState is
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-- Increment program counter (Remember that PC will be update only on the next cycle...
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-- Increment program counter (Remember that PC will be update only on the next cycle...
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PC <= PC + conv_std_logic_vector(1, nBits);
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PC <= PC + conv_std_logic_vector(1, nBits);
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MemoryDataRdAddr <= PC; -- Warning PC is not 1 yet...
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MemoryDataRdAddr <= PC; -- Warning PC is not 1 yet...
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IR <= MemoryDataInput;
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IR <= MemoryDataInput;
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MemoryDataReadEn <= '1';
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MemoryDataReadEn <= '1';
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MemoryDataWriteEn <= '0';
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nextCpuState <= decode;
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nextCpuState <= decode;
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-- Detect with instruction came from memory, set the number of cycles to execute...
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-- Detect with instruction came from memory, set the number of cycles to execute...
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when decode =>
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when decode =>
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MemoryDataReadEn <= '0';
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MemoryDataReadEn <= '0';
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MemoryDataWriteEn <= '0';
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MemoryDataWriteEn <= '0';
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-- The high attribute points to the highes bit position
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-- The high attribute points to the highes bit position
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case opcodeIR is
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case opcodeIR is
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when mov_reg | mov_val | add_reg | add_val | sub_reg | and_reg | or_reg | xor_reg | ld_reg | ld_val | stom_reg | stom_val =>
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when mov_reg | mov_val | add_reg | add_val | sub_reg | and_reg | or_reg | xor_reg =>
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nextCpuState <= execute;
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nextCpuState <= execute;
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cyclesExecute := 1; -- Wait 1 cycles
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cyclesExecute := 1; -- Wait 1 cycles
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currInstruction <= IR;
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currInstruction <= IR;
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when ld_reg | ld_val | stom_reg | stom_val =>
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nextCpuState <= execute;
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cyclesExecute := 2; -- Wait 2 cycles
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currInstruction <= IR;
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when jmp_val | jmpr_val =>
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when jmp_val | jmpr_val =>
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nextCpuState <= execute;
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nextCpuState <= execute;
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cyclesExecute := 0; -- No Wait cycle
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cyclesExecute := 0; -- No Wait cycle
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-- Invalid instruction (Now will be ignored, but latter should raise a trap
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-- Invalid instruction (Now will be ignored, but latter should raise a trap
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Line 148... |
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when ld_val =>
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when ld_val =>
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MemoryDataRdAddr <= "0000000000" & operand_imm;
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MemoryDataRdAddr <= "0000000000" & operand_imm;
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MemoryDataReadEn <= '1';
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MemoryDataReadEn <= '1';
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-- STORE r1,10 (Store the value on r1 in the main memory located at address 10)
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-- STORE r1,10 (Store the value 10 on memory address pointed by r1)
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when stom_val =>
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when stom_val =>
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MemoryDataWrAddr <= "0000000000" & operand_imm;
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-- And put the imediate value ...
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MemoryDataOut <= "0000000000" & operand_imm;
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if cyclesExecute = 1 then
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-- After the register data is avaible in DataDp we put it's address and
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accDp := DataDp;
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MemoryDataWrAddr <= accDp;
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elsif cyclesExecute = 0 then
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-- strobe in to enter the data
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MemoryDataWriteEn <= '1';
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MemoryDataWriteEn <= '1';
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MemoryDataOut <= DataDp;
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end if;
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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MuxDp <= fromMemory;
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MuxDp <= fromMemory;
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DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
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DpRegFileWriteAddr <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
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-- The part that interface with the memory is located on the first process
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-- The part that interface with the memory is located on the first process
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nextExState <= writeRegister;
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nextExState <= writeRegister;
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-- STORE r1,10 (Store the value on r1 in the main memory located at address 10)
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-- STORE r1,10 (Store the value 10 on the main memory pointed by r1)
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when stom_val =>
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when stom_val =>
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MuxDp <= fromRegFileB;
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MuxDp <= fromRegFileB;
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DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
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DpRegFileReadAddrB <= Num2reg(conv_integer(UNSIGNED(operand_reg1)));
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DpRegFileReadEnB <= '1';
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DpRegFileReadEnB <= '1';
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nextExState <= readRegisterB;
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-- The part that interface with the memory is located on the first process
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-- The part that interface with the memory is located on the first process
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nextExState <= readRegisterB;
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nextExState <= readRegisterB;
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-- ADD r2,r0 (See the testDatapath to see how to drive the datapath for this function)
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-- ADD r2,r0 (See the testDatapath to see how to drive the datapath for this function)
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when add_reg | sub_reg | and_reg | or_reg | xor_reg =>
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when add_reg | sub_reg | and_reg | or_reg | xor_reg =>
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