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Line 24... |
alu_xor, alu_not, alu_shfLt, alu_shfRt, alu_roLt, alu_roRt);
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alu_xor, alu_not, alu_shfLt, alu_shfRt, alu_roLt, alu_roRt);
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type typeEnDis is (enable, disable);
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type typeEnDis is (enable, disable);
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type generalRegisters is (r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15);
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type generalRegisters is (r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15);
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type dpMuxInputs is (fromMemory, fromImediate, fromRegFileA, fromRegFileB, fromAlu);
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type dpMuxInputs is (fromMemory, fromImediate, fromRegFileA, fromRegFileB, fromAlu);
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type controlUnitStates is (initial, fetch, decode, execute, executing);
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type controlUnitStates is (initial, fetch, decode, execute, executing);
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type executionStates is (s0, s1, s2, s3, s4);
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function reg2Num (a: generalRegisters) return integer;
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function reg2Num (a: generalRegisters) return integer;
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function Num2reg (a: integer) return generalRegisters;
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function Num2reg (a: integer) return generalRegisters;
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function muxPos( a: dpMuxInputs) return std_logic_vector;
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function muxPos( a: dpMuxInputs) return std_logic_vector;
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-- Opcodes
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-- Opcodes
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subtype opcodes is std_logic_vector(5 downto 0);
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subtype opcodes is std_logic_vector(5 downto 0); -- 6 Bits (64 instructions max)
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-- Each instruction will take 32 bits
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-- Each instruction will take 32 bits
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-- Tutorial on using records.. (http://vhdlguru.blogspot.com.br/2010/02/arrays-and-records-in-vhdl.html)
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-- Tutorial on using records.. (http://vhdlguru.blogspot.com.br/2010/02/arrays-and-records-in-vhdl.html)
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type instructionType is record
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type instructionType is record
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opcode : std_logic_vector(5 downto 0);
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opcode : std_logic_vector(5 downto 0);
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