| Line 321... |
Line 321... |
wait for CLK_period; -- Executing ... 4
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wait for CLK_period; -- Executing ... 4
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|
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-- Verify memory strobe signal
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-- Verify memory strobe signal
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assert MemoryDataWriteEn = '1' report "Invalid value" severity FAILURE;
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assert MemoryDataWriteEn = '1' report "Invalid value" severity FAILURE;
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|
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-------------------------------------------------------------------------------------------------
|
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|
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-- ld r5,20 (Load into r5 register the content of the memory at address 20)----------------------
|
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REPORT "ld r5,20" SEVERITY NOTE;
|
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MemoryDataInput <= ld_val & conv_std_logic_vector(reg2Num(r5),4) & conv_std_logic_vector(20, 22);
|
|
wait for CLK_period; -- Fetch
|
|
wait for CLK_period; -- Decode
|
|
wait for CLK_period; -- Execute
|
|
|
|
-- Write the command to a file (This will be usefull for the top Testing later)
|
|
WRITE (line_out, MemoryDataInput);
|
|
WRITELINE (cmdfile, line_out);
|
|
|
|
assert MemoryDataRdAddr = conv_std_logic_vector(20, 32) report "Invalid value" severity FAILURE;
|
|
|
|
wait for CLK_period; -- Executing ... 1
|
|
|
|
wait for CLK_period; -- Executing ... 2
|
|
|
wait for CLK_period; -- Executing ... 3
|
wait for CLK_period; -- Executing ... 3
|
|
|
assert MemoryDataWriteEn = '0' report "Invalid value" severity FAILURE;
|
wait for CLK_period; -- Executing ... 4
|
|
|
|
wait for CLK_period; -- Executing ... 4
|
|
|
-------------------------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------------------------
|
|
|
-- Close file
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-- Close file
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file_close(cmdfile);
|
file_close(cmdfile);
|
-- Finish simulation
|
-- Finish simulation
|
