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[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [testTriStateBuffer.vhd] - Diff between revs 14 and 18

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Rev 14 Rev 18
Line 62... Line 62...
                sel <= enable;
                sel <= enable;
                A <= conv_std_logic_vector(10, nBits);
                A <= conv_std_logic_vector(10, nBits);
                wait for 1 ns;  -- Wait to stabilize the response
                wait for 1 ns;  -- Wait to stabilize the response
                assert S = (conv_std_logic_vector(10, nBits)) report "Output should be high impedance..." severity FAILURE;
                assert S = (conv_std_logic_vector(10, nBits)) report "Output should be high impedance..." severity FAILURE;
 
 
      wait;
      -- Finish simulation
 
                assert false report "NONE. End of simulation." severity failure;
   end process;
   end process;
 
 
END;
END;
 
 
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