| Line 196... |
Line 196... |
DISPLAY_WIDTH = 'h10, // Display configuration
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DISPLAY_WIDTH = 'h10, // Display configuration
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DISPLAY_HEIGHT = 'h12,
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DISPLAY_HEIGHT = 'h12,
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DISPLAY_SIZE_LO = 'h14,
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DISPLAY_SIZE_LO = 'h14,
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DISPLAY_SIZE_HI = 'h16,
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DISPLAY_SIZE_HI = 'h16,
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DISPLAY_CFG = 'h18,
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DISPLAY_CFG = 'h18,
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DISPLAY_REFR_CNT = 'h1A,
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LT24_CFG = 'h20, // LT24 configuration and Generic command sending
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LT24_CFG = 'h20, // LT24 configuration and Generic command sending
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LT24_REFRESH = 'h22,
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LT24_REFRESH = 'h22,
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LT24_REFRESH_SYNC = 'h24,
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LT24_REFRESH_SYNC = 'h24,
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LT24_CMD = 'h26,
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LT24_CMD = 'h26,
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| Line 249... |
Line 250... |
DISPLAY_WIDTH_D = (BASE_REG << DISPLAY_WIDTH ),
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DISPLAY_WIDTH_D = (BASE_REG << DISPLAY_WIDTH ),
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DISPLAY_HEIGHT_D = (BASE_REG << DISPLAY_HEIGHT ),
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DISPLAY_HEIGHT_D = (BASE_REG << DISPLAY_HEIGHT ),
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DISPLAY_SIZE_LO_D = (BASE_REG << DISPLAY_SIZE_LO ),
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DISPLAY_SIZE_LO_D = (BASE_REG << DISPLAY_SIZE_LO ),
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DISPLAY_SIZE_HI_D = (BASE_REG << DISPLAY_SIZE_HI ),
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DISPLAY_SIZE_HI_D = (BASE_REG << DISPLAY_SIZE_HI ),
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DISPLAY_CFG_D = (BASE_REG << DISPLAY_CFG ),
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DISPLAY_CFG_D = (BASE_REG << DISPLAY_CFG ),
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DISPLAY_REFR_CNT_D = (BASE_REG << DISPLAY_REFR_CNT ),
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LT24_CFG_D = (BASE_REG << LT24_CFG ),
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LT24_CFG_D = (BASE_REG << LT24_CFG ),
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LT24_REFRESH_D = (BASE_REG << LT24_REFRESH ),
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LT24_REFRESH_D = (BASE_REG << LT24_REFRESH ),
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LT24_REFRESH_SYNC_D = (BASE_REG << LT24_REFRESH_SYNC ),
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LT24_REFRESH_SYNC_D = (BASE_REG << LT24_REFRESH_SYNC ),
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LT24_CMD_D = (BASE_REG << LT24_CMD ),
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LT24_CMD_D = (BASE_REG << LT24_CMD ),
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| Line 308... |
Line 310... |
(DISPLAY_WIDTH_D & {DEC_SZ{(reg_addr == DISPLAY_WIDTH )}}) |
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(DISPLAY_WIDTH_D & {DEC_SZ{(reg_addr == DISPLAY_WIDTH )}}) |
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(DISPLAY_HEIGHT_D & {DEC_SZ{(reg_addr == DISPLAY_HEIGHT )}}) |
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(DISPLAY_HEIGHT_D & {DEC_SZ{(reg_addr == DISPLAY_HEIGHT )}}) |
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(DISPLAY_SIZE_LO_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_LO )}}) |
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(DISPLAY_SIZE_LO_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_LO )}}) |
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(DISPLAY_SIZE_HI_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_HI )}}) |
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(DISPLAY_SIZE_HI_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_HI )}}) |
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(DISPLAY_CFG_D & {DEC_SZ{(reg_addr == DISPLAY_CFG )}}) |
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(DISPLAY_CFG_D & {DEC_SZ{(reg_addr == DISPLAY_CFG )}}) |
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(DISPLAY_REFR_CNT_D & {DEC_SZ{(reg_addr == DISPLAY_REFR_CNT )}}) |
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(LT24_CFG_D & {DEC_SZ{(reg_addr == LT24_CFG )}}) |
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(LT24_CFG_D & {DEC_SZ{(reg_addr == LT24_CFG )}}) |
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(LT24_REFRESH_D & {DEC_SZ{(reg_addr == LT24_REFRESH )}}) |
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(LT24_REFRESH_D & {DEC_SZ{(reg_addr == LT24_REFRESH )}}) |
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(LT24_REFRESH_SYNC_D & {DEC_SZ{(reg_addr == LT24_REFRESH_SYNC )}}) |
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(LT24_REFRESH_SYNC_D & {DEC_SZ{(reg_addr == LT24_REFRESH_SYNC )}}) |
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(LT24_CMD_D & {DEC_SZ{(reg_addr == LT24_CMD )}}) |
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(LT24_CMD_D & {DEC_SZ{(reg_addr == LT24_CMD )}}) |
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| Line 574... |
Line 577... |
display_x_swap_o,
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display_x_swap_o,
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display_y_swap_o,
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display_y_swap_o,
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display_cl_swap_o};
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display_cl_swap_o};
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//------------------------------------------------
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//------------------------------------------------
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// DISPLAY_REFR_CNT Register
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//------------------------------------------------
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reg [15:0] display_refr_cnt;
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wire display_refr_cnt_wr = reg_wr[DISPLAY_REFR_CNT];
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wire display_refr_cnt_dec = gfx_irq_refr_done_set & (display_refr_cnt != 16'h0000);
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always @ (posedge mclk or posedge puc_rst)
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if (puc_rst) display_refr_cnt <= 16'h0000;
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else if (display_refr_cnt_wr) display_refr_cnt <= per_din_i;
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else if (display_refr_cnt_dec) display_refr_cnt <= display_refr_cnt + 16'hFFFF; // -1
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//------------------------------------------------
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// LT24_CFG Register
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// LT24_CFG Register
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//------------------------------------------------
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//------------------------------------------------
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reg [15:0] lt24_cfg;
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reg [15:0] lt24_cfg;
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wire lt24_cfg_wr = reg_wr[LT24_CFG];
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wire lt24_cfg_wr = reg_wr[LT24_CFG];
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| Line 1223... |
Line 1239... |
wire [15:0] display_size_lo_read = display_size_lo_rd & {16{reg_rd[DISPLAY_SIZE_LO ]}};
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wire [15:0] display_size_lo_read = display_size_lo_rd & {16{reg_rd[DISPLAY_SIZE_LO ]}};
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`ifdef WITH_DISPLAY_SIZE_HI
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`ifdef WITH_DISPLAY_SIZE_HI
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wire [15:0] display_size_hi_read = display_size_hi_rd & {16{reg_rd[DISPLAY_SIZE_HI ]}};
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wire [15:0] display_size_hi_read = display_size_hi_rd & {16{reg_rd[DISPLAY_SIZE_HI ]}};
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`endif
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`endif
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wire [15:0] display_cfg_read = display_cfg & {16{reg_rd[DISPLAY_CFG ]}};
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wire [15:0] display_cfg_read = display_cfg & {16{reg_rd[DISPLAY_CFG ]}};
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wire [15:0] display_refr_cnt_read = display_refr_cnt & {16{reg_rd[DISPLAY_REFR_CNT ]}};
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wire [15:0] lt24_cfg_read = lt24_cfg & {16{reg_rd[LT24_CFG ]}};
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wire [15:0] lt24_cfg_read = lt24_cfg & {16{reg_rd[LT24_CFG ]}};
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wire [15:0] lt24_refresh_read = lt24_refresh & {16{reg_rd[LT24_REFRESH ]}};
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wire [15:0] lt24_refresh_read = lt24_refresh & {16{reg_rd[LT24_REFRESH ]}};
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wire [15:0] lt24_refresh_sync_read = lt24_refresh_sync & {16{reg_rd[LT24_REFRESH_SYNC ]}};
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wire [15:0] lt24_refresh_sync_read = lt24_refresh_sync & {16{reg_rd[LT24_REFRESH_SYNC ]}};
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wire [15:0] lt24_cmd_read = lt24_cmd & {16{reg_rd[LT24_CMD ]}};
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wire [15:0] lt24_cmd_read = lt24_cmd & {16{reg_rd[LT24_CMD ]}};
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| Line 1289... |
Line 1306... |
display_size_lo_read |
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display_size_lo_read |
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`ifdef WITH_DISPLAY_SIZE_HI
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`ifdef WITH_DISPLAY_SIZE_HI
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display_size_hi_read |
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display_size_hi_read |
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`endif
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`endif
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display_cfg_read |
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display_cfg_read |
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display_refr_cnt_read |
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lt24_cfg_read |
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lt24_cfg_read |
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lt24_refresh_read |
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lt24_refresh_read |
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lt24_refresh_sync_read |
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lt24_refresh_sync_read |
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lt24_cmd_read |
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lt24_cmd_read |
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