?rev1line? |
?rev2line? |
|
/*
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|
WARNING: Do NOT edit the input and output ports in this file in a text
|
|
editor if you plan to continue editing the block that represents it in
|
|
the Block Editor! File corruption is VERY likely to occur.
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|
*/
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|
/*
|
|
Copyright (C) 1991-2010 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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|
and other software and tools, and its AMPP partner logic
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|
functions, and any output files from any of the foregoing
|
|
(including device programming or simulation files), and any
|
|
associated documentation or information are expressly subject
|
|
to the terms and conditions of the Altera Program License
|
|
Subscription Agreement, Altera MegaCore Function License
|
|
Agreement, or other applicable license agreement, including,
|
|
without limitation, that your use is for the sole purpose of
|
|
programming logic devices manufactured by Altera and sold by
|
|
Altera or its authorized distributors. Please refer to the
|
|
applicable agreement for further details.
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|
*/
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|
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