URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [rtl/] [verilog/] [omsp_clock_module.v] - Diff between revs 85 and 103

Rev 85	Rev 103
Line 33...	Line 33...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 85 $`	`// $Rev: 103 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2011-01-28 22:05:37 +0100 (Fri, 28 Jan 2011) $`	`// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`include "timescale.v"	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
	`endif

`module omsp_clock_module (`	`module omsp_clock_module (`

`// OUTPUTs`	`// OUTPUTs`
`aclk_en, // ACLK enable`	`aclk_en, // ACLK enable`
Line 252...	Line 254...
`wire puc = puc_s[1];`	`wire puc = puc_s[1];`


`endmodule // omsp_clock_module`	`endmodule // omsp_clock_module`

	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_undefines.v"	`include "openMSP430_undefines.v"
	`endif

`No newline at end of file`	`No newline at end of file`