OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [clock_module_asic_lfxt.v] - Diff between revs 180 and 200

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 180 Rev 200
Line 92... Line 92... 
      // Generate IRQ and make sure CPU re-runs with LFXT_CLK
 
      // Generate IRQ and make sure CPU re-runs with LFXT_CLK
 
      //--------------------------------------------------------
 
      //--------------------------------------------------------
 
 
 
 
 
      wkup[0]   = 1'b1;
 
      wkup[0]   = 1'b1;
 
      @(negedge mclk);
 
      @(negedge mclk);
 
      irq[0]    = 1'b1;
 
      irq[`IRQ_NR-16]  = 1'b1;
 
      @(negedge irq_acc[0])
 
      @(negedge irq_acc[`IRQ_NR-16])
 
      @(negedge mclk);
 
      @(negedge mclk);
 
      wkup[0]   = 1'b0;
 
      wkup[0]   = 1'b0;
 
      irq[0]    = 1'b0;
 
      irq[`IRQ_NR-16]    = 1'b0;
 
 
 
 
 
      @(r15 === 16'h0003);
 
      @(r15 === 16'h0003);
 
      #10;
 
      #10;
 
      mclk_counter     = 0;
 
      mclk_counter     = 0;
 
      lfxt_clk_counter = 0;
 
      lfxt_clk_counter = 0;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.