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/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* OMSP_SYSTEM HEADER FILE */
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/*---------------------------------------------------------------------------*/
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/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/*===========================================================================*/
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//=============================================================================
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// PERIPHERALS REGISTER DEFINITIONS
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//=============================================================================
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//----------------------------------------------------------
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// SPECIAL FUNCTION REGISTERS
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//----------------------------------------------------------
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#define IE1 (*(volatile unsigned char *) 0x0000)
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#define IFG1 (*(volatile unsigned char *) 0x0002)
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#define CPU_ID_LO (*(volatile unsigned char *) 0x0004)
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#define CPU_ID_HI (*(volatile unsigned char *) 0x0006)
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//----------------------------------------------------------
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// GPIOs
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//----------------------------------------------------------
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#define P1IN (*(volatile unsigned char *) 0x0020)
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#define P1OUT (*(volatile unsigned char *) 0x0021)
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#define P1DIR (*(volatile unsigned char *) 0x0022)
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#define P1IFG (*(volatile unsigned char *) 0x0023)
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#define P1IES (*(volatile unsigned char *) 0x0024)
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#define P1IE (*(volatile unsigned char *) 0x0025)
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#define P1SEL (*(volatile unsigned char *) 0x0026)
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#define P2IN (*(volatile unsigned char *) 0x0028)
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#define P2OUT (*(volatile unsigned char *) 0x0029)
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#define P2DIR (*(volatile unsigned char *) 0x002A)
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#define P2IFG (*(volatile unsigned char *) 0x002B)
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#define P2IES (*(volatile unsigned char *) 0x002C)
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#define P2IE (*(volatile unsigned char *) 0x002D)
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#define P2SEL (*(volatile unsigned char *) 0x002E)
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#define P3IN (*(volatile unsigned char *) 0x0018)
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#define P3OUT (*(volatile unsigned char *) 0x0019)
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#define P3DIR (*(volatile unsigned char *) 0x001A)
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#define P3SEL (*(volatile unsigned char *) 0x001B)
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#define P4IN (*(volatile unsigned char *) 0x001C)
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#define P4OUT (*(volatile unsigned char *) 0x001D)
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#define P4DIR (*(volatile unsigned char *) 0x001E)
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#define P4SEL (*(volatile unsigned char *) 0x001F)
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#define P5IN (*(volatile unsigned char *) 0x0030)
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#define P5OUT (*(volatile unsigned char *) 0x0031)
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#define P5DIR (*(volatile unsigned char *) 0x0032)
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#define P5SEL (*(volatile unsigned char *) 0x0033)
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#define P6IN (*(volatile unsigned char *) 0x0034)
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#define P6OUT (*(volatile unsigned char *) 0x0035)
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#define P6DIR (*(volatile unsigned char *) 0x0036)
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#define P6SEL (*(volatile unsigned char *) 0x0037)
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//----------------------------------------------------------
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// BASIC CLOCK MODULE
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//----------------------------------------------------------
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#define BCSCTL1 (*(volatile unsigned char *) 0x0057)
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#define BCSCTL2 (*(volatile unsigned char *) 0x0058)
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//----------------------------------------------------------
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// WATCHDOG TIMER
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//----------------------------------------------------------
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// Addresses
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#define WDTCTL (*(volatile unsigned int *) 0x0120)
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// Bit masks
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#define WDTIS0 (0x0001)
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#define WDTIS1 (0x0002)
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#define WDTSSEL (0x0004)
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#define WDTCNTCL (0x0008)
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#define WDTTMSEL (0x0010)
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#define WDTNMI (0x0020)
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#define WDTNMIES (0x0040)
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#define WDTHOLD (0x0080)
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#define WDTPW (0x5A00)
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//----------------------------------------------------------
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// HARDWARE MULTIPLIER
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//----------------------------------------------------------
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#define OP1_MPY (*(volatile unsigned int *) 0x0130)
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#define OP1_MPYS (*(volatile unsigned int *) 0x0132)
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#define OP1_MAC (*(volatile unsigned int *) 0x0134)
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#define OP1_MACS (*(volatile unsigned int *) 0x0136)
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#define OP2 (*(volatile unsigned int *) 0x0138)
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#define RESLO (*(volatile unsigned int *) 0x013A)
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#define RESHI (*(volatile unsigned int *) 0x013C)
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#define SUMEXT (*(volatile unsigned int *) 0x013E)
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//----------------------------------------------------------
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// TIMER A
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//----------------------------------------------------------
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#define TACTL (*(volatile unsigned int *) 0x0160)
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#define TAR (*(volatile unsigned int *) 0x0170)
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#define TACCTL0 (*(volatile unsigned int *) 0x0162)
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#define TACCR0 (*(volatile unsigned int *) 0x0172)
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#define TACCTL1 (*(volatile unsigned int *) 0x0164)
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#define TACCR1 (*(volatile unsigned int *) 0x0174)
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#define TACCTL2 (*(volatile unsigned int *) 0x0166)
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#define TACCR2 (*(volatile unsigned int *) 0x0176)
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#define TAIV (*(volatile unsigned int *) 0x012E)
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//=============================================================================
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// INTERRUPT VECTORS
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//=============================================================================
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#define interrupt(x) void __attribute__((interrupt (x)))
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#define eint() __eint()
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#define dint() __dint()
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#define RESET_VECTOR (0x001E) // Vector 15 (0xFFFE) - Reset - [Highest Priority]
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#define NMI_VECTOR (0x001C) // Vector 14 (0xFFFC) - Non-maskable -
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#define UNUSED_13_VECTOR (0x001A) // Vector 13 (0xFFFA) - -
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#define UNUSED_12_VECTOR (0x0018) // Vector 12 (0xFFF8) - -
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#define UNUSED_11_VECTOR (0x0016) // Vector 11 (0xFFF6) - -
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#define WDT_VECTOR (0x0014) // Vector 10 (0xFFF4) - Watchdog Timer -
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#define TIMERA0_VECTOR (0x0012) // Vector 9 (0xFFF2) - Timer A CC0 -
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#define TIMERA1_VECTOR (0x0010) // Vector 8 (0xFFF0) - Timer A CC1-2, TA -
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#define UNUSED_07_VECTOR (0x000E) // Vector 7 (0xFFEE) - -
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#define UNUSED_06_VECTOR (0x000C) // Vector 6 (0xFFEC) - -
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#define UNUSED_05_VECTOR (0x000A) // Vector 5 (0xFFEA) - -
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#define UNUSED_04_VECTOR (0x0008) // Vector 4 (0xFFE8) - -
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#define PORT2_VECTOR (0x0006) // Vector 3 (0xFFE6) - Port 1 -
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#define PORT1_VECTOR (0x0004) // Vector 2 (0xFFE4) - Port 1 -
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#define UNUSED_01_VECTOR (0x0002) // Vector 1 (0xFFE2) - -
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#define UNUSED_00_VECTOR (0x0000) // Vector 0 (0xFFE0) - - [Lowest Priority]
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