OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [omsp_register_file.v] - Diff between revs 136 and 181

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 136 Rev 181
Line 34... Line 34...
//
//
// *Author(s):
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//              - Olivier Girard,    olgirard@gmail.com
//
//
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// $Rev: 130 $
// $Rev: 103 $
// $LastChangedBy: olivier.girard $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2012-03-01 22:45:40 +0100 (Thu, 01 Mar 2012) $
// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
//----------------------------------------------------------------------------
//----------------------------------------------------------------------------
`ifdef OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`else
`include "openMSP430_defines.v"
`include "openMSP430_defines.v"
`endif
`endif
Line 207... Line 207...
 
 
 
 
wire        mclk_r2 = mclk;
wire        mclk_r2 = mclk;
`endif
`endif
 
 
`ifdef ASIC
`ifdef ASIC_CLOCKING
   `ifdef CPUOFF_EN
   `ifdef CPUOFF_EN
   wire [15:0] cpuoff_mask = 16'h0010;
   wire [15:0] cpuoff_mask = 16'h0010;
   `else
   `else
   wire [15:0] cpuoff_mask = 16'h0000;
   wire [15:0] cpuoff_mask = 16'h0000;
   `endif
   `endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.