| Line 225... |
Line 225... |
SET_PARAM0(PARAM1 << 16);
|
SET_PARAM0(PARAM1 << 16);
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}
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}
|
INSTRUCTION (l_and) {
|
INSTRUCTION (l_and) {
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uorreg_t temp1;
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uorreg_t temp1;
|
temp1 = PARAM1 & PARAM2;
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temp1 = PARAM1 & PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
if (ARITH_SET_FLAG) {
|
|
if(!temp1)
|
|
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
|
|
else
|
|
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
|
|
}
|
|
}
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}
|
INSTRUCTION (l_or) {
|
INSTRUCTION (l_or) {
|
uorreg_t temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 | PARAM2;
|
temp1 = PARAM1 | PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
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}
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}
|
INSTRUCTION (l_xor) {
|
INSTRUCTION (l_xor) {
|
uorreg_t temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 ^ PARAM2;
|
temp1 = PARAM1 ^ PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
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}
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}
|
INSTRUCTION (l_sub) {
|
INSTRUCTION (l_sub) {
|
orreg_t temp1;
|
orreg_t temp1, temp2, temp3;
|
temp1 = (orreg_t)PARAM1 - (orreg_t)PARAM2;
|
|
SET_OV_FLAG_FN (temp1);
|
temp3 = (orreg_t)PARAM2;
|
|
temp2 = (orreg_t)PARAM1;
|
|
temp1 = temp2 - temp3;
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
|
|
|
/* Set overflow if a negative value minus a positive value gave a positive
|
|
sum, or if a positive value minus a negative value gave a negative
|
|
sum. Otherwise clear it */
|
|
if ((((long int) temp2 < 0) &&
|
|
((long int) temp3 >= 0) &&
|
|
((long int) temp1 >= 0)) ||
|
|
(((long int) temp2 >= 0) &&
|
|
((long int) temp3 < 0) &&
|
|
((long int) temp1 < 0)))
|
|
{
|
|
cpu_state.sprs[SPR_SR] |= SPR_SR_OV;
|
|
}
|
|
else
|
|
{
|
|
cpu_state.sprs[SPR_SR] &= ~SPR_SR_OV;
|
|
}
|
|
|
|
/* Set the carry flag if (as unsigned values) the second operand is greater
|
|
than the first. */
|
|
if ((uorreg_t) temp3 > (uorreg_t) temp2)
|
|
{
|
|
cpu_state.sprs[SPR_SR] |= SPR_SR_CY;
|
|
}
|
|
else
|
|
{
|
|
cpu_state.sprs[SPR_SR] &= ~SPR_SR_CY;
|
|
}
|
|
|
|
/* Trigger a range exception if the overflow flag is set and the SR[OVE] bit
|
|
is set. */
|
|
if (((cpu_state.sprs[SPR_SR] & SPR_SR_OVE) == SPR_SR_OVE) &&
|
|
((cpu_state.sprs[SPR_SR] & SPR_SR_OV) == SPR_SR_OV))
|
|
{
|
|
except_handle (EXCEPT_RANGE, cpu_state.pc);
|
|
}
|
}
|
}
|
/*int mcount = 0;*/
|
/*int mcount = 0;*/
|
INSTRUCTION (l_mul) {
|
INSTRUCTION (l_mul) {
|
orreg_t temp0, temp1, temp2;
|
orreg_t temp0, temp1, temp2;
|
LONGEST ltemp0, ltemp1, ltemp2;
|
LONGEST ltemp0, ltemp1, ltemp2;
|
| Line 396... |
Line 425... |
}
|
}
|
INSTRUCTION (l_sll) {
|
INSTRUCTION (l_sll) {
|
uorreg_t temp1;
|
uorreg_t temp1;
|
|
|
temp1 = PARAM1 << PARAM2;
|
temp1 = PARAM1 << PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
INSTRUCTION (l_sra) {
|
INSTRUCTION (l_sra) {
|
orreg_t temp1;
|
orreg_t temp1;
|
|
|
temp1 = (orreg_t)PARAM1 >> PARAM2;
|
temp1 = (orreg_t)PARAM1 >> PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
INSTRUCTION (l_srl) {
|
INSTRUCTION (l_srl) {
|
uorreg_t temp1;
|
uorreg_t temp1;
|
temp1 = PARAM1 >> PARAM2;
|
temp1 = PARAM1 >> PARAM2;
|
SET_OV_FLAG_FN (temp1);
|
|
SET_PARAM0(temp1);
|
SET_PARAM0(temp1);
|
/* runtime.sim.cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
}
|
}
|
INSTRUCTION (l_ror) {
|
INSTRUCTION (l_ror) {
|
uorreg_t temp1;
|
uorreg_t temp1;
|
