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#include "inst-set-test.h"
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#include "inst-set-test.h"
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* Test of divide l.div
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* A macro to carry out a test of divide signed or unsigned
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*
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* Arguments
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* opc: The opcode
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* op1: First operand value
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* op2: Second operand value
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* res: Expected result
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* cy: Expected carry flag
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* ov: Expected overflow flag
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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#define TEST_DIV(opc, op1, op2, res, cy, ov) \
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l.mfspr r3,r0,SPR_SR ;\
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LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) ;\
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l.and r3,r3,r2 /* Clear flags */ ;\
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l.mtspr r0,r3,SPR_SR ;\
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;\
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l.or r4,r0,r0 /* Clear result reg */ ;\
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LOAD_CONST (r5,op1) /* Load numbers to add */ ;\
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LOAD_CONST (r6,op2) ;\
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l.mtspr r0,r0,SPR_EPCR_BASE /* Clear record */ ;\
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50: opc r4,r5,r6 ;\
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l.mfspr r2,r0,SPR_SR /* So we can examine flags */ ;\
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l.mfspr r5,r0,SPR_EPCR_BASE /* What triggered exception */ ;\
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PUSH (r5) /* Save EPCR for later */ ;\
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PUSH (r2) /* Save SR for later */ ;\
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PUSH (r4) /* Save result for later */ ;\
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;\
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PUTS (" 0x") ;\
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PUTH (op1) ;\
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PUTS (" / 0x") ;\
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PUTH (op2) ;\
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PUTS (" = 0x") ;\
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PUTH (res) ;\
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PUTS (": ") ;\
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POP (r4) ;\
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CHECK_RES1 (r4, res) ;\
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;\
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POP (r2) /* Retrieve SR */ ;\
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PUSH (r2) ;\
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- carry flag set: ", cy) ;\
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;\
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POP (r2) /* Retrieve SR */ ;\
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LOAD_CONST (r4, SPR_SR_OV) /* The overflow bit */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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CHECK_FLAG ("- overflow flag set: ", ov) ;\
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;\
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POP (r2) /* Retrieve EPCR */ ;\
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LOAD_CONST (r4, 50b) /* The opcode of interest */ ;\
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l.and r2,r2,r4 ;\
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l.sfeq r2,r4 ;\
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l.bnf 51f ;\
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;\
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PUTS (" - exception triggered: TRUE\n") ;\
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l.j 52f ;\
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l.nop ;\
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;\
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51: PUTS (" - exception triggered: FALSE\n") ;\
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52:
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/* ----------------------------------------------------------------------------
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* Start of code
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* ------------------------------------------------------------------------- */
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.section .text
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.section .text
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.global _start
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.global _start
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_start:
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_start:
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/* Signed divide by zero */
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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l.and r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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l.jal _puts
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l.nop
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/* ----------------------------------------------------------------------------
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* Test of divide signed, l.div
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* ------------------------------------------------------------------------- */
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_div:
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_div:
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LOAD_STR (r3, "l.div\n")
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LOAD_STR (r3, "l.div\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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LOAD_CONST (r2, ~SPR_SR_CY) /* Clear the carry flag */
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/* Divide two positive numbers and check rounding. Should set no
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flags. */
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TEST_DIV (l.div, 0x0000000c, 0x00000003,
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0x00000004, FALSE, FALSE)
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TEST_DIV (l.div, 0x0000000b, 0x00000003,
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0x00000003, FALSE, FALSE)
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/* Divide two negative numbers and check rounding. Should set no
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flags. */
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TEST_DIV (l.div, 0xfffffff4, 0xfffffffd,
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0x00000004, FALSE, FALSE)
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TEST_DIV (l.div, 0xfffffff5, 0xfffffffd,
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0x00000003, FALSE, FALSE)
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/* Divide a negative number by a positive number and check
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rounding. Should set no flags. */
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TEST_DIV (l.div, 0xfffffff4, 0x00000003,
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0xfffffffc, FALSE, FALSE)
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TEST_DIV (l.div, 0xfffffff5, 0x00000003,
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0xfffffffd, FALSE, FALSE)
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/* Divide a positive number by a negative number and check
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rounding. Should set no flags. */
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TEST_DIV (l.div, 0x0000000c, 0xfffffffd,
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0xfffffffc, FALSE, FALSE)
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TEST_DIV (l.div, 0x0000000b, 0xfffffffd,
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0xfffffffd, FALSE, FALSE)
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/* Divide by zero. Should set the overflow flag. */
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TEST_DIV (l.div, 0x0000000c, 0x00000000,
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0x00000000, TRUE, FALSE)
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TEST_DIV (l.div, 0xfffffff4, 0x00000000,
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0x00000000, TRUE, FALSE)
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/* Check that range exceptions are triggered */
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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l.or r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag set **\n")
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l.jal _puts
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l.nop
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/* Divide by zero. Should set the overflow flag and trigger an
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exception. */
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TEST_DIV (l.div, 0x0000000c, 0x00000000,
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0x00000000, TRUE, FALSE)
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TEST_DIV (l.div, 0xfffffff4, 0x00000000,
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0x00000000, TRUE, FALSE)
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/* Finished checking range exceptions */
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l.mfspr r3,r0,SPR_SR
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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l.and r3,r3,r2
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l.and r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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l.mtspr r0,r3,SPR_SR
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LOAD_CONST (r5,1) /* Set up args for division */
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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LOAD_CONST (r6,0)
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l.jal _puts
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l.div r4,r5,r6
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l.nop
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l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
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l.and r2,r2,r4
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l.sfeq r2,r4
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CHECK_FLAG ("1 / 0 (with error) carry flag set: ", TRUE)
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/* Signed divide by zero */
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/* ----------------------------------------------------------------------------
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* Test of divide unsigned, l.divu
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* ------------------------------------------------------------------------- */
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_divu:
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_divu:
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LOAD_STR (r3, "l.divu\n")
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LOAD_STR (r3, "l.divu\n")
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l.jal _puts
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l.jal _puts
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l.nop
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l.nop
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LOAD_CONST (r2, ~SPR_SR_CY) /* Clear the carry flag */
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/* Divide two positive numbers and check rounding. Should set no
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flags. */
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TEST_DIV (l.divu, 0x0000000c, 0x00000003,
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0x00000004, FALSE, FALSE)
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TEST_DIV (l.divu, 0x0000000b, 0x00000003,
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0x00000003, FALSE, FALSE)
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/* Divide two numbers that would be negative under 2's complement and
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check rounding. Should set no flags. */
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TEST_DIV (l.divu, 0xfffffff4, 0xfffffffd,
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0x00000000, FALSE, FALSE)
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TEST_DIV (l.divu, 0xfffffff5, 0xfffffffd,
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0x00000000, FALSE, FALSE)
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/* Divide a number that would be negative under 2's complement by a
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number that would be positive under 2's complement and check
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rounding. Should set no flags. */
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TEST_DIV (l.divu, 0xfffffff4, 0x00000003,
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0x55555551, FALSE, FALSE)
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TEST_DIV (l.divu, 0xfffffff5, 0x00000003,
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0x55555551, FALSE, FALSE)
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/* Divide a number that would be positive under 2's complement by a
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number that would be negative under 2's complement and check
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rounding. Should set no flags. */
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TEST_DIV (l.divu, 0x0000000c, 0xfffffffd,
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0x00000000, FALSE, FALSE)
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TEST_DIV (l.divu, 0x0000000b, 0xfffffffd,
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0x00000000, FALSE, FALSE)
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/* Divide by zero. Should set the overflow flag. */
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TEST_DIV (l.divu, 0x0000000c, 0x00000000,
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0x00000000, TRUE, FALSE)
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TEST_DIV (l.divu, 0xfffffff4, 0x00000000,
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0x00000000, TRUE, FALSE)
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/* Check that range exceptions are triggered */
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l.mfspr r3,r0,SPR_SR
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
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l.or r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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LOAD_STR (r3, " ** OVE flag set **\n")
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l.jal _puts
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l.nop
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/* Divide by zero. Should set the overflow flag and trigger an
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exception. */
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TEST_DIV (l.divu, 0x0000000c, 0x00000000,
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0x00000000, TRUE, FALSE)
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TEST_DIV (l.divu, 0xfffffff4, 0x00000000,
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0x00000000, TRUE, FALSE)
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/* Finished checking range exceptions */
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l.mfspr r3,r0,SPR_SR
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LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
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l.and r3,r3,r2
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l.and r3,r3,r2
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l.mtspr r0,r3,SPR_SR
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l.mtspr r0,r3,SPR_SR
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LOAD_CONST (r5,1) /* Set up args for division */
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LOAD_STR (r3, " ** OVE flag cleared **\n")
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LOAD_CONST (r6,0)
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l.jal _puts
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l.divu r4,r5,r6
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l.nop
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l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
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LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
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l.and r2,r2,r4
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l.sfeq r2,r4
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CHECK_FLAG ("1 / 0 (with error) carry flag set: ", TRUE)
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/* ----------------------------------------------------------------------------
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/* ----------------------------------------------------------------------------
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* All done
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* All done
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* ------------------------------------------------------------------------- */
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* ------------------------------------------------------------------------- */
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_exit:
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_exit:
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