URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [include/] [or1200_defines.v] - Diff between revs 503 and 530

Rev 503	Rev 530
Line 362...	Line 362...
`// Try either one to find what yields`	`// Try either one to find what yields`
`// higher clock frequencyin your case.`	`// higher clock frequencyin your case.`
`//`	`//`
//`define OR1200_IMPL_ALU_COMP1	//`define OR1200_IMPL_ALU_COMP1
`define OR1200_IMPL_ALU_COMP2	`define OR1200_IMPL_ALU_COMP2
	//`define OR1200_IMPL_ALU_COMP3

`//`	`//`
`// Implement Find First/Last '1'`	`// Implement Find First/Last '1'`
`//`	`//`
`define OR1200_IMPL_ALU_FFL1	`define OR1200_IMPL_ALU_FFL1