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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_genpc.v] - Diff between revs 363 and 814

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Rev 363 Rev 814
Line 107... Line 107...
input                           spr_pc_we;
input                           spr_pc_we;
input                           genpc_refetch;
input                           genpc_refetch;
input                           genpc_freeze;
input                           genpc_freeze;
input                           no_more_dslot;
input                           no_more_dslot;
 
 
 
parameter boot_adr = `OR1200_BOOT_ADR;
//
//
// Internal wires and regs
// Internal wires and regs
//
//
reg     [31:2]                  pcreg_default;
reg     [31:2]                  pcreg_default;
wire    [31:0]                   pcreg_boot;
 
reg                             pcreg_select;
reg                             pcreg_select;
reg     [31:2]                  pcreg;
reg     [31:2]                  pcreg;
reg     [31:0]                   pc;
reg     [31:0]                   pc;
// Set in event of jump or taken branch   
// Set in event of jump or taken branch   
reg                             ex_branch_taken;
reg                             ex_branch_taken;
Line 256... Line 256...
   // PC register
   // PC register
   //
   //
   always @(posedge clk or `OR1200_RST_EVENT rst)
   always @(posedge clk or `OR1200_RST_EVENT rst)
     // default value 
     // default value 
     if (rst == `OR1200_RST_VALUE) begin
     if (rst == `OR1200_RST_VALUE) begin
        pcreg_default <=  `OR1200_BOOT_PCREG_DEFAULT; // jb
        pcreg_default <=  (boot_adr >>2) - 4;
        pcreg_select <=  1'b1;// select async. value due to reset state
        pcreg_select <=  1'b1;// select async. value due to reset state
     end
     end
   // selected value (different from default) is written into FF after
   // selected value (different from default) is written into FF after
   // reset state
   // reset state
     else if (pcreg_select) begin
     else if (pcreg_select) begin
Line 276... Line 276...
        pcreg_default <=  pc[31:2];
        pcreg_default <=  pc[31:2];
     end
     end
 
 
   // select async. value for pcreg after reset - PC jumps to the address selected
   // select async. value for pcreg after reset - PC jumps to the address selected
   // after boot.
   // after boot.
   assign  pcreg_boot = `OR1200_BOOT_ADR; // changed JB
   wire [31:0] pcreg_boot = boot_adr;
 
 
   always @(pcreg_boot or pcreg_default or pcreg_select)
   always @(pcreg_boot or pcreg_default or pcreg_select)
     if (pcreg_select)
     if (pcreg_select)
       // async. value is selected due to reset state 
       // async. value is selected due to reset state 
       pcreg = pcreg_boot[31:2];
       pcreg = pcreg_boot[31:2];

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