URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [GCC/] [OpenRISC/] [portasm.S] - Diff between revs 669 and 675

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Rev 669	Rev 675
Line 1...	Line 1...
`#include "port_spr_defs.h"`	`#include "port_spr_defs.h"`
	`#include "portmacro.h"`
	`#include "FreeRTOSConfig.h"`


`.file "portasm.S"`	`.file "portasm.S"`
`.section .text`	`.section .text`

`.macro portSAVE_CONTEXT`	`.macro portSAVE_CONTEXT`
`.global pxCurrentTCB`	`.global pxCurrentTCB`
`# make rooms in stack`	`# make rooms in stack`
`l.addi r1, r1, -132`	`l.addi r1, r1, -STACKFRAME_SIZE`
`# early save r3-r5, these are clobber register`	`# early save r3-r5, these are clobber register`
`l.sw 0x08(r1), r3`	`l.sw 0x08(r1), r3`
`l.sw 0x0C(r1), r4`	`l.sw 0x0C(r1), r4`
`l.sw 0x10(r1), r5`	`l.sw 0x10(r1), r5`
`# save SPR_ESR_BASE(0), SPR_EPCR_BASE(0)`	`# save SPR_ESR_BASE(0), SPR_EPCR_BASE(0)`
`l.mfspr r3, r0, SPR_ESR_BASE`	`l.mfspr r3, r0, SPR_ESR_BASE`
`l.mfspr r4, r0, SPR_EPCR_BASE`	`l.mfspr r4, r0, SPR_EPCR_BASE`
`l.sw 0x78(r1), r3`	`l.sw 0x78(r1), r3`
`l.sw 0x7C(r1), r4`	`l.sw 0x7C(r1), r4`
`l.sw 0x00(r1), r9`
`# Save Context`	`# Save Context`
	`l.sw 0x00(r1), r9`
`l.sw 0x04(r1), r2`	`l.sw 0x04(r1), r2`
`l.sw 0x14(r1), r6`	`l.sw 0x14(r1), r6`
`l.sw 0x18(r1), r7`	`l.sw 0x18(r1), r7`
`l.sw 0x1C(r1), r8`	`l.sw 0x1C(r1), r8`
`l.sw 0x20(r1), r10`	`l.sw 0x20(r1), r10`
Line 96...	Line 99...
`l.mtspr r0, r4, SPR_EPCR_BASE`	`l.mtspr r0, r4, SPR_EPCR_BASE`
`# restore clobber register`	`# restore clobber register`
`l.lwz r3, 0x08(r1)`	`l.lwz r3, 0x08(r1)`
`l.lwz r4, 0x0C(r1)`	`l.lwz r4, 0x0C(r1)`
`l.lwz r5, 0x10(r1)`	`l.lwz r5, 0x10(r1)`
`l.addi r1, r1, 132`	`l.addi r1, r1, STACKFRAME_SIZE`
`l.rfe`	`l.rfe`
`l.nop`	`l.nop`
`.endm`	`.endm`

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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Source/] [portable/] [GCC/] [OpenRISC/] [portasm.S] - Diff between revs 669 and 675