OpenCores
URL https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk

Subversion Repositories or1200_soc

[/] [or1200_soc/] [trunk/] [src/] [soc_mem_bank_2.v] - Diff between revs 22 and 24

Show entire file | Details | Blame | View Log

Rev 22 Rev 24
Line 56... Line 56...
                  .big_endian_if_i(1'b1),
                  .big_endian_if_i(1'b1),
                  .lo_byte_if_i(1'b1)
                  .lo_byte_if_i(1'b1)
                );
                );
 
 
        //---------------------------------------------------
        //---------------------------------------------------
        // outputs for stub
        // outputs for nor flash
        assign mem_err_o = 1'b0;
        assign mem_err_o = 1'b0;
        assign mem_rty_o = 1'b0;
        assign mem_rty_o = 1'b0;
        assign fl_rst_n = ~mem_rst_i;
        assign fl_rst_n = ~mem_rst_i;
 
 
      end
      end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.