URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [projects/] [sp605_lx45t_wishbone/] [sp605_lx45t_wishbone.aws] - Diff between revs 51 and 53

Rev 51	Rev 53
Line 6...	Line 6...
`ambpex5_v20_sx50t_core=.\..\ambpex5_v20_sx50t_core\ambpex5_v20_sx50t_core.adf`	`ambpex5_v20_sx50t_core=.\..\ambpex5_v20_sx50t_core\ambpex5_v20_sx50t_core.adf`
`sp605_lx45t_core=.\..\sp605_lx45t_core\sp605_lx45t_core.adf`	`sp605_lx45t_core=.\..\sp605_lx45t_core\sp605_lx45t_core.adf`
`ac701_a200t_core=.\..\ac701_a200t_core\ac701_a200t_core.adf`	`ac701_a200t_core=.\..\ac701_a200t_core\ac701_a200t_core.adf`
`cl_a7pcie_x4=.\..\..\..\..\..\coregen\core14_5_a7\cl_a7pcie_x4\cl_a7pcie_x4.adf`	`cl_a7pcie_x4=.\..\..\..\..\..\coregen\core14_5_a7\cl_a7pcie_x4\cl_a7pcie_x4.adf`
`[Settings]`	`[Settings]`
`Active=ac701_a200t_core`	`Active=sp605_lx45t_wishbone`
`[Expand]`	`[Expand]`
`sp605_lx45t_wishbone=0`	`sp605_lx45t_wishbone=1`
`ambpex5_sx50t_wishbone=0`	`ambpex5_sx50t_wishbone=0`
`ambpex5_v20_sx50t_core=0`	`ambpex5_v20_sx50t_core=0`
`sp605_lx45t_core=0`	`sp605_lx45t_core=0`
`ac701_a200t_core=1`	`ac701_a200t_core=1`
`cl_a7pcie_x4=0`	`cl_a7pcie_x4=0`