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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [application/] [wb_test/] [src/] [work/] [wb_teststrm.cpp] - Diff between revs 19 and 30

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Rev 19 Rev 30
Line 1... Line 1...
 
 
 
#define __VERBOSE__
 
 
#include <stdio.h>
#include <stdio.h>
#include <fcntl.h>
#include <fcntl.h>
#include <pthread.h>
#include <pthread.h>
#include <unistd.h>
#include <unistd.h>
Line 66... Line 67...
 
 
    PrepareWb();
    PrepareWb();
 
 
    rd0.trd=trdNo;
    rd0.trd=trdNo;
    rd0.Strm=strmNo;
    rd0.Strm=strmNo;
   // pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
    pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
 
 
    bufIsvi = new U32[SizeBlockOfWords*2];
    bufIsvi = new U32[SizeBlockOfWords*2];
    pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, U32(0x3000),U32(1), 0, 1, U32(0) );
   // pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, U32(0x3000),U32(1), 0, 1, U32(0) );
}
}
 
 
void WB_TestStrm::Start( void )
void WB_TestStrm::Start( void )
{
{
    int res = pthread_attr_init(&attrThread_);
    int res = pthread_attr_init(&attrThread_);
Line 132... Line 133...
 
 
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "PACKAGE :", pkg_out.BlockWr, pkg_in.BlockRd, pkg_in.BlockOk, pkg_in.BlockError );
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "PACKAGE :", pkg_out.BlockWr, pkg_in.BlockRd, pkg_in.BlockOk, pkg_in.BlockError );
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_0 :", tr0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError );
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_0 :", tr0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError );
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_1 :", tr1.BlockWr, rd1.BlockRd, rd1.BlockOk, rd1.BlockError );
    //BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_1 :", tr1.BlockWr, rd1.BlockRd, rd1.BlockOk, rd1.BlockError );
 
 
    U32 status = 0; //pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
    U32 status = pBrd->wb_block_read( 1, 0x10 );
    rd0.BlockWr=pBrd->wb_block_read( 1, 0x11 );
    rd0.BlockWr=pBrd->wb_block_read( 1, 0x11 );
 
    U32 sig = pBrd->wb_block_read( 1, 0x12 );
 
      //pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
 
    //rd0.BlockWr=pBrd->wb_block_read( 1, 0x11 );
 
 
    BRDC_fprintf( stdout, "%6s %3d %10d %10d %10d %10d  %9.1f %10.1f     0x%.4X  %d %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, IsviStatus, IsviCnt, rd0.fftTime_us );
    BRDC_fprintf( stdout, "%6s %3d %10d %10d %10d %10d  %9.1f %10.1f     0x%.4X  0x%.8X %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, sig, IsviCnt, rd0.fftTime_us );
 
 
 
 
 
 
 
 
}
}
Line 289... Line 293...
    if( isAdmReg2 )
    if( isAdmReg2 )
        PrepareAdmReg( fnameAdmReg2 );
        PrepareAdmReg( fnameAdmReg2 );
 
 
    pBrd->RegPokeInd( 4, 0, 0x2038 );
    pBrd->RegPokeInd( 4, 0, 0x2038 );
*/
*/
 
    pBrd->wb_block_write( 1, 8, 1 );
 
 
    pBrd->StreamStart( rd0.Strm );
    pBrd->StreamStart( rd0.Strm );
 
 
    U32 val;
    U32 val;
    val=pBrd->wb_block_read( 1, 0 );
    val=pBrd->wb_block_read( 1, 0 );
    BRDC_fprintf( stderr, "ID=0x%.4X \n", val );
    BRDC_fprintf( stderr, "ID=0x%.4X \n", val );
Line 301... Line 307...
    BRDC_fprintf( stderr, "VER=0x%.4X \n", val );
    BRDC_fprintf( stderr, "VER=0x%.4X \n", val );
 
 
    val=pBrd->wb_block_read( 1, 8 );
    val=pBrd->wb_block_read( 1, 8 );
    BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
    BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
 
 
    pBrd->wb_block_write( 1, 9, 5 );
    pBrd->wb_block_write( 1, 8, 0 );
 
    pBrd->wb_block_write( 1, 9, 1 );
    pBrd->wb_block_write( 1, 8, 0x6A0 );
    pBrd->wb_block_write( 1, 8, 0x6A0 );
 
 
    val=pBrd->wb_block_read( 1, 8 );
    val=pBrd->wb_block_read( 1, 8 );
    BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
    BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
 
 

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