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---- from http://www.opencores.org/lgpl.shtml ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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---- ----
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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LIBRARY ieee;
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.std_logic_1164.ALL;
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use work.RSAFinalizerProperties.ALL;
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-- Uncomment the following library declaration if using
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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-- arithmetic functions with Signed or Unsigned values
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--USE ieee.numeric_std.ALL;
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--USE ieee.numeric_std.ALL;
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COMPONENT ShiftReg
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COMPONENT ShiftReg
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-- generic (length_1 : integer := WORD_LENGTH;
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-- generic (length_1 : integer := WORD_LENGTH;
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-- length_2 : integer := BYTE
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-- length_2 : integer := BYTE
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GENERIC (
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GENERIC (
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length_1 : integer := BYTE;
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length_1 : integer := 8;
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length_2 : integer := WORD_LENGTH
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length_2 : integer := 64
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);
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);
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PORT(
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PORT(
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input : in STD_LOGIC_VECTOR(7 downto 0);
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input : in STD_LOGIC_VECTOR(7 downto 0);
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--input : IN std_logic_vector(63 downto 0);
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--input : IN std_logic_vector(63 downto 0);
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output : out STD_LOGIC_VECTOR(63 downto 0);
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output : out STD_LOGIC_VECTOR(63 downto 0);
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input <= "10101010";
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input <= "10101010";
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--input <= "1111000011110000111100001111000011110000111100001111000011110000";
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--input <= "1111000011110000111100001111000011110000111100001111000011110000";
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wait for 100 ns;
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wait for 100 ns;
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reset <= '1';
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reset <= '1';
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wait for clk_period*10;
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wait for clk_period*10;
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reset <= '0';
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en <= '1';
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en <= '1';
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wait for clk_period*1;
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wait for clk_period*1;
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en <= '0';
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en <= '0';
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wait for clk_period*1;
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wait for clk_period*1;
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shift <= '1';
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shift <= '1';
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