URL https://opencores.org/ocsvn/raptor64/raptor64/trunk

Subversion Repositories raptor64

[/] [raptor64/] [trunk/] [rtl/] [verilog/] [Raptor64_regfile.v] - Diff between revs 30 and 45

Rev 30	Rev 45
Line 23...	Line 23...
`// along with this program. If not, see <http://www.gnu.org/licenses/>.`	`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
`//`	`//`
`//`	`//`
`//=============================================================================`	`//=============================================================================`

`module Raptor64_regfile(clk, advanceR, advanceW, dRa, dRb, dRc, dpc,`	`module Raptor64_regfile(clk, advanceR, advanceW, wIRvalid, dRa, dRb, dRc, dpc,`
`xRt, m1Rt, m2Rt, wRt, tRt, xData, m1Data, m2Data, wData, tData, nxt_a, nxt_b, nxt_c);`	`xRt, m1Rt, m2Rt, wRt, tRt, xData, m1Data, m2Data, wData, tData, nxt_a, nxt_b, nxt_c);`
`input clk;`	`input clk;`
`input advanceR;`	`input advanceR;`
`input advanceW;`	`input advanceW;`
	`input wIRvalid;`
`input [8:0] dRa;`	`input [8:0] dRa;`
`input [8:0] dRb;`	`input [8:0] dRb;`
`input [8:0] dRc;`	`input [8:0] dRc;`
`input [63:0] dpc;`	`input [63:0] dpc;`
`input [8:0] xRt;`	`input [8:0] xRt;`
Line 53...	Line 54...
`syncRam512x64_1rw3r u1`	`syncRam512x64_1rw3r u1`
`(`	`(`
`.wrst(1'b0),`	`.wrst(1'b0),`
`.wclk(clk),`	`.wclk(clk),`
`.wce(advanceW),`	`.wce(advanceW),`
`.we(1'b1),`	`.we(wIRvalid),`
`.wadr(wRt),`	`.wadr(wRt),`
`.i(wData),`	`.i(wData),`
`.wo(),`	`.wo(),`

`.rrsta(1'b0),`	`.rrsta(1'b0),`