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[/] [raptor64/] [trunk/] [rtl/] [verilog/] [Raptor64_regfile.v] - Diff between revs 45 and 48

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Rev 45 Rev 48
Line 79... Line 79...
        .radrc(dRc),
        .radrc(dRc),
        .roc(rfoc)
        .roc(rfoc)
);
);
 
 
 
 
reg [63:0] nxt_a;
//      casex(dRa)
always @(dRa or xData or m1Data or m2Data or wData or tData or rfoa or dpc or xRt or m1Rt or m2Rt or wRt or tRt)
//      9'bxxxx00000:   nxt_a <= 64'd0;
        casex(dRa)
//      9'bxxxx11101:   nxt_a <= dpc;
        9'bxxxx00000:   nxt_a <= 64'd0;
//      xRt:    nxt_a <= xData;
        9'bxxxx11101:   nxt_a <= dpc;
//      m1Rt:   nxt_a <= m1Data;
        xRt:    nxt_a <= xData;
//      m2Rt:   nxt_a <= m2Data;
        m1Rt:   nxt_a <= m1Data;
//      wRt:    nxt_a <= wData;
        m2Rt:   nxt_a <= m2Data;
//      tRt:    nxt_a <= tData;
        wRt:    nxt_a <= wData;
//      default:        nxt_a <= rfoa;
        tRt:    nxt_a <= tData;
//      endcase
        default:        nxt_a <= rfoa;
 
        endcase
//reg [63:0] nxt_b;
 
//always @(dRb or xData or m1Data or m2Data or wData or tData or rfob or dpc or xRt or m1Rt or m2Rt or wRt or tRt)
reg [63:0] nxt_b;
//      casex(dRb)
always @(dRb or xData or m1Data or m2Data or wData or tData or rfob or dpc or xRt or m1Rt or m2Rt or wRt or tRt)
//      9'bxxxx00000:   nxt_b <= 64'd0;
        casex(dRb)
//      9'bxxxx11101:   nxt_b <= dpc;
        9'bxxxx00000:   nxt_b <= 64'd0;
//      xRt:    nxt_b <= xData;
        9'bxxxx11101:   nxt_b <= dpc;
//      m1Rt:   nxt_b <= m1Data;
        xRt:    nxt_b <= xData;
//      m2Rt:   nxt_b <= m2Data;
        m1Rt:   nxt_b <= m1Data;
//      wRt:    nxt_b <= wData;
        m2Rt:   nxt_b <= m2Data;
//      tRt:    nxt_b <= tData;
        wRt:    nxt_b <= wData;
//      default:        nxt_b <= rfob;
        tRt:    nxt_b <= tData;
//      endcase
        default:        nxt_b <= rfob;
//
        endcase
//reg [63:0] nxt_c;
 
//always @(dRc or xData or m1Data or m2Data or wData or tData or rfoc or dpc or xRt or m1Rt or m2Rt or wRt or tRt)
reg [63:0] nxt_c;
//      casex(dRc)
always @(dRc or xData or m1Data or m2Data or wData or tData or rfoc or dpc or xRt or m1Rt or m2Rt or wRt or tRt)
//      9'bxxxx00000:   nxt_c <= 64'd0;
        casex(dRc)
//      9'bxxxx11101:   nxt_c <= dpc;
        9'bxxxx00000:   nxt_c <= 64'd0;
//      xRt:    nxt_c <= xData;
        9'bxxxx11101:   nxt_c <= dpc;
//      m1Rt:   nxt_c <= m1Data;
        xRt:    nxt_c <= xData;
//      m2Rt:   nxt_c <= m2Data;
        m1Rt:   nxt_c <= m1Data;
//      wRt:    nxt_c <= wData;
        m2Rt:   nxt_c <= m2Data;
//      tRt:    nxt_c <= tData;
        wRt:    nxt_c <= wData;
//      default:        nxt_c <= rfoc;
        tRt:    nxt_c <= tData;
//      endcase
        default:        nxt_c <= rfoc;
 
        endcase
 
 
 
 
 
endmodule
endmodule
 
 
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