| Line 28... |
Line 28... |
wire [15:0] tc_dato;
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wire [15:0] tc_dato;
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wire [15:0] pic_dato;
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wire [15:0] pic_dato;
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wire tc_ack;
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wire tc_ack;
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wire pic_ack;
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wire pic_ack;
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reg pulse1000Hz,pulse100Hz;
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reg pulse1000Hz,pulse100Hz;
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wire [7:0] config_rec;
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reg [7:0] config_reco;
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wire uart_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_0A);
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wire uart_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_0A);
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wire rast_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDA_01);
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wire rast_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDA_01);
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wire AC97_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_10);
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wire AC97_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_10);
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wire spr_ack = sys_iocyc && sys_stb && (sys_adr[23:16]==8'hD8);
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wire spr_ack = sys_iocyc && sys_stb && (sys_adr[23:16]==8'hD8);
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wire Led_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_06);
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wire Led_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_06);
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wire dt_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_04);
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wire dt_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC_04);
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wire p100ack = sys_iocyc && sys_stb && (sys_adr[63:0]==64'hFFFFFFFF_FFFF0010);
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wire p100ack = sys_iocyc && sys_stb && (sys_adr[23:0]==24'hDCFFFC);
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wire p1000ack = sys_iocyc && sys_stb && (sys_adr[63:0]==64'hFFFFFFFF_FFFF0000);
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wire p1000ack = sys_iocyc && sys_stb && (sys_adr[23:0]==24'hDCFFFD);
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wire config_rec_ack = sys_iocyc && sys_stb && sys_adr[23:0]==24'hDCFFFF;
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wire perr_ack = sys_iocyc && sys_stb && sys_adr[23:0]==24'hDCFFFE;
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wire tmp_ack = sys_iocyc && sys_stb && (sys_adr[23:8]==16'hDC03);
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assign ram_ack = sys_cyc && sys_stb && (sys_adr[63:32]==32'd1);
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assign ram_ack = sys_cyc && sys_stb && (sys_adr[63:32]==32'd1);
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assign sys_ack = br_ack|stk_ack|scr_ack|tc_ack|pic_ack|ram_ack|uart_ack|rast_ack|AC97_ack|spr_ack|Led_ack|dt_ack|p100ack|p1000ack;
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assign sys_ack = br_ack|stk_ack|scr_ack|tc_ack|pic_ack|ram_ack|uart_ack|rast_ack|AC97_ack|spr_ack|Led_ack|dt_ack|p100ack|p1000ack|config_rec_ack|tmp_ack|perr_ack;
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assign config_rec = 8'b0000_0111;
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always @(config_rec_ack)
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config_reco <= config_rec_ack ? config_rec : 8'd0;
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initial begin
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initial begin
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clk = 1;
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clk = 1;
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pulse1000Hz = 0;
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pulse1000Hz = 0;
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pulse100Hz = 0;
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pulse100Hz = 0;
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| Line 817... |
Line 828... |
64'hFFFFFFFFFFFFFFE8: romout <= 64'h37800000000DE000;
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64'hFFFFFFFFFFFFFFE8: romout <= 64'h37800000000DE000;
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64'hFFFFFFFFFFFFFFF0: romout <= 64'h000000CFFFFFFA00;
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64'hFFFFFFFFFFFFFFF0: romout <= 64'h000000CFFFFFFA00;
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64'hFFFFFFFFFFFFFFF8: romout <= 64'h37800000000DE000;
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64'hFFFFFFFFFFFFFFF8: romout <= 64'h37800000000DE000;
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default: romout <= 64'd0;
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default: romout <= 64'd0;
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endcase
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endcase
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assign sys_dbi = br_dato|keybdout|stk_dato|scr_dato| {4{tc_dato}} | {4{pic_dato}};
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assign sys_dbi = br_dato|keybdout|stk_dato|scr_dato| {4{tc_dato}} | {4{pic_dato}} | {8{config_reco}};
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Raptor64sc u1
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Raptor64sc u1
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(
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(
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.rst_i(rst),
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.rst_i(rst),
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