| Line 138... |
Line 138... |
areset_n : in std_logic;
|
areset_n : in std_logic;
|
enable : in std_logic;
|
enable : in std_logic;
|
|
|
readRequestReady_i : in std_logic;
|
readRequestReady_i : in std_logic;
|
writeRequestReady_i : in std_logic;
|
writeRequestReady_i : in std_logic;
|
|
size_i : in std_logic_vector(3 downto 0);
|
offset_i : in std_logic_vector(20 downto 0);
|
offset_i : in std_logic_vector(20 downto 0);
|
wdptr_i : in std_logic;
|
wdptr_i : in std_logic;
|
payloadLength_i : in std_logic_vector(3 downto 0);
|
payloadLength_i : in std_logic_vector(2 downto 0);
|
payloadIndex_o : out std_logic_vector(3 downto 0);
|
payloadIndex_o : out std_logic_vector(2 downto 0);
|
payload_i : in std_logic_vector(31 downto 0);
|
payload_i : in std_logic_vector(63 downto 0);
|
done_o : out std_logic;
|
done_o : out std_logic;
|
|
|
readResponseReady_o : out std_logic;
|
readResponseReady_o : out std_logic;
|
writeResponseReady_o : out std_logic;
|
writeResponseReady_o : out std_logic;
|
wdptr_o : out std_logic;
|
status_o : out std_logic_vector(3 downto 0);
|
payloadLength_o : out std_logic_vector(3 downto 0);
|
payloadLength_o : out std_logic_vector(2 downto 0);
|
payloadIndex_i : in std_logic_vector(3 downto 0);
|
payloadIndex_i : in std_logic_vector(2 downto 0);
|
payload_o : out std_logic_vector(31 downto 0);
|
payload_o : out std_logic_vector(63 downto 0);
|
done_i : in std_logic;
|
done_i : in std_logic;
|
|
|
configStb_o : out std_logic;
|
configStb_o : out std_logic;
|
configWe_o : out std_logic;
|
configWe_o : out std_logic;
|
configAdr_o : out std_logic_vector(21 downto 0);
|
configAdr_o : out std_logic_vector(21 downto 0);
|
| Line 178... |
Line 179... |
crf_o : out std_logic;
|
crf_o : out std_logic;
|
prio_o : out std_logic_vector(1 downto 0);
|
prio_o : out std_logic_vector(1 downto 0);
|
tt_o : out std_logic_vector(1 downto 0);
|
tt_o : out std_logic_vector(1 downto 0);
|
dstid_o : out std_logic_vector(31 downto 0);
|
dstid_o : out std_logic_vector(31 downto 0);
|
srcid_o : out std_logic_vector(31 downto 0);
|
srcid_o : out std_logic_vector(31 downto 0);
|
|
size_o : out std_logic_vector(3 downto 0);
|
|
status_o : out std_logic_vector(3 downto 0);
|
tid_o : out std_logic_vector(7 downto 0);
|
tid_o : out std_logic_vector(7 downto 0);
|
hop_o : out std_logic_vector(7 downto 0);
|
hop_o : out std_logic_vector(7 downto 0);
|
offset_o : out std_logic_vector(20 downto 0);
|
offset_o : out std_logic_vector(20 downto 0);
|
wdptr_o : out std_logic;
|
wdptr_o : out std_logic;
|
payloadLength_o : out std_logic_vector(3 downto 0);
|
payloadLength_o : out std_logic_vector(2 downto 0);
|
payloadIndex_i : in std_logic_vector(3 downto 0);
|
payloadIndex_i : in std_logic_vector(2 downto 0);
|
payload_o : out std_logic_vector(31 downto 0);
|
payload_o : out std_logic_vector(63 downto 0);
|
done_i : in std_logic;
|
done_i : in std_logic;
|
|
|
inboundCyc_i : in std_logic;
|
inboundCyc_i : in std_logic;
|
inboundStb_i : in std_logic;
|
inboundStb_i : in std_logic;
|
inboundAdr_i : in std_logic_vector(7 downto 0);
|
inboundAdr_i : in std_logic_vector(7 downto 0);
|
| Line 211... |
Line 214... |
crf_i : in std_logic;
|
crf_i : in std_logic;
|
prio_i : in std_logic_vector(1 downto 0);
|
prio_i : in std_logic_vector(1 downto 0);
|
tt_i : in std_logic_vector(1 downto 0);
|
tt_i : in std_logic_vector(1 downto 0);
|
dstid_i : in std_logic_vector(31 downto 0);
|
dstid_i : in std_logic_vector(31 downto 0);
|
srcid_i : in std_logic_vector(31 downto 0);
|
srcid_i : in std_logic_vector(31 downto 0);
|
|
size_i : in std_logic_vector(3 downto 0);
|
status_i : in std_logic_vector(3 downto 0);
|
status_i : in std_logic_vector(3 downto 0);
|
tid_i : in std_logic_vector(7 downto 0);
|
tid_i : in std_logic_vector(7 downto 0);
|
hop_i : in std_logic_vector(7 downto 0);
|
hop_i : in std_logic_vector(7 downto 0);
|
offset_i : in std_logic_vector(20 downto 0);
|
offset_i : in std_logic_vector(20 downto 0);
|
wdptr_i : in std_logic;
|
wdptr_i : in std_logic;
|
payloadLength_i : in std_logic_vector(3 downto 0);
|
payloadLength_i : in std_logic_vector(2 downto 0);
|
payloadIndex_o : out std_logic_vector(3 downto 0);
|
payloadIndex_o : out std_logic_vector(2 downto 0);
|
payload_i : in std_logic_vector(31 downto 0);
|
payload_i : in std_logic_vector(63 downto 0);
|
done_o : out std_logic;
|
done_o : out std_logic;
|
|
|
outboundCyc_o : out std_logic;
|
outboundCyc_o : out std_logic;
|
outboundStb_o : out std_logic;
|
outboundStb_o : out std_logic;
|
outboundDat_o : out std_logic_vector(31 downto 0);
|
outboundDat_o : out std_logic_vector(31 downto 0);
|
| Line 399... |
Line 403... |
|
|
---------------------------------------------------------------------------
|
---------------------------------------------------------------------------
|
-- Create a randomly initialized data array.
|
-- Create a randomly initialized data array.
|
---------------------------------------------------------------------------
|
---------------------------------------------------------------------------
|
procedure CreateRandomPayload(
|
procedure CreateRandomPayload(
|
variable payload : out HalfwordArray(0 to 132);
|
variable payload : out HalfwordArray;
|
variable seed1 : inout positive;
|
variable seed1 : inout positive;
|
variable seed2 : inout positive);
|
variable seed2 : inout positive);
|
procedure CreateRandomPayload(
|
procedure CreateRandomPayload(
|
variable payload : out DoublewordArray(0 to 31);
|
variable payload : out DoublewordArray;
|
variable seed1 : inout positive;
|
variable seed1 : inout positive;
|
variable seed2 : inout positive);
|
variable seed2 : inout positive);
|
|
|
---------------------------------------------------------------------------
|
---------------------------------------------------------------------------
|
-- Create a generic RapidIO frame.
|
-- Create a generic RapidIO frame.
|
| Line 669... |
Line 673... |
|
|
---------------------------------------------------------------------------
|
---------------------------------------------------------------------------
|
-- Create a randomly initialized data array.
|
-- Create a randomly initialized data array.
|
---------------------------------------------------------------------------
|
---------------------------------------------------------------------------
|
procedure CreateRandomPayload(
|
procedure CreateRandomPayload(
|
variable payload : out HalfwordArray(0 to 132);
|
variable payload : out HalfwordArray;
|
variable seed1 : inout positive;
|
variable seed1 : inout positive;
|
variable seed2 : inout positive) is
|
variable seed2 : inout positive) is
|
variable rand: real;
|
variable rand: real;
|
variable int_rand: integer;
|
variable int_rand: integer;
|
variable stim: std_logic_vector(7 downto 0);
|
variable stim: std_logic_vector(7 downto 0);
|
| Line 687... |
Line 691... |
payload(i)(15 downto 8) := std_logic_vector(to_unsigned(int_rand, 8));
|
payload(i)(15 downto 8) := std_logic_vector(to_unsigned(int_rand, 8));
|
end loop;
|
end loop;
|
end procedure;
|
end procedure;
|
|
|
procedure CreateRandomPayload(
|
procedure CreateRandomPayload(
|
variable payload : out DoublewordArray(0 to 31);
|
variable payload : out DoublewordArray;
|
variable seed1 : inout positive;
|
variable seed1 : inout positive;
|
variable seed2 : inout positive) is
|
variable seed2 : inout positive) is
|
variable rand: real;
|
variable rand: real;
|
variable int_rand: integer;
|
variable int_rand: integer;
|
variable stim: std_logic_vector(7 downto 0);
|
variable stim: std_logic_vector(7 downto 0);
|
