URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [msvc13/] [libdbg64g/] [exportmap.def] - Diff between revs 2 and 3

Rev 2	Rev 3
Line 40...	Line 40...
`RISCV_get_core_folder`	`RISCV_get_core_folder`
`RISCV_set_current_dir`	`RISCV_set_current_dir`
`RISCV_get_services_with_iface`	`RISCV_get_services_with_iface`
`RISCV_get_clock_services`	`RISCV_get_clock_services`
`RISCV_break_simulation`	`RISCV_break_simulation`
`RISCV_is_active`
`RISCV_malloc`	`RISCV_malloc`
`RISCV_free`	`RISCV_free`
`RISCV_enable_log`	`RISCV_enable_log`
`RISCV_disable_log`	`RISCV_disable_log`
	`RISCV_dispatcher_start`
	`RISCV_register_timer`
	`RISCV_unregister_timer`