| Line 23... |
Line 23... |
DECODE:
|
DECODE:
|
begin
|
begin
|
first_ifetch <= `TRUE;
|
first_ifetch <= `TRUE;
|
Rt <= 4'h0; // Default
|
Rt <= 4'h0; // Default
|
state <= IFETCH;
|
state <= IFETCH;
|
pc <= pcp1;
|
pc <= pc + pc_inc;
|
|
a <= rfoa;
|
|
// This case statement should include all opcodes or the opcode
|
|
// will end up being treated as an undefined operation.
|
case(ir[7:0])
|
case(ir[7:0])
|
`STP: begin clk_en <= 1'b0; end
|
`STP: clk_en <= 1'b0;
|
`NOP: casex(ir[63:0])
|
`NOP: ;
|
{`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp8;
|
// casex(ir[63:0])
|
{8'hxx,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp7;
|
// {`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp8;
|
{16'hxxxx,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp6;
|
// {8'hxx,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp7;
|
{24'hxxxxxx,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp5;
|
// {16'hxxxx,`NOP,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp6;
|
{32'hxxxxxxxx,`NOP,`NOP,`NOP,`NOP}: pc <= pcp4;
|
// {24'hxxxxxx,`NOP,`NOP,`NOP,`NOP,`NOP}: pc <= pcp5;
|
{40'hxxxxxxxxxx,`NOP,`NOP,`NOP}: pc <= pcp3;
|
// {32'hxxxxxxxx,`NOP,`NOP,`NOP,`NOP}: pc <= pcp4;
|
{48'hxxxxxxxxxxxx,`NOP,`NOP}: pc <= pcp2;
|
// {40'hxxxxxxxxxx,`NOP,`NOP,`NOP}: pc <= pcp3;
|
{56'hxxxxxxxxxxxxxx,`NOP}: pc <= pcp1;
|
// {48'hxxxxxxxxxxxx,`NOP,`NOP}: pc <= pcp2;
|
endcase
|
// {56'hxxxxxxxxxxxxxx,`NOP}: pc <= pcp1;
|
`CLC: begin cf <= 1'b0; end
|
// endcase
|
`SEC: begin cf <= 1'b1; end
|
`CLC: cf <= 1'b0;
|
`CLV: begin vf <= 1'b0; end
|
`SEC: cf <= 1'b1;
|
`CLI: begin im <= 1'b0; end
|
`CLV: vf <= 1'b0;
|
`CLD: begin df <= 1'b0; end
|
`CLI: im <= 1'b0;
|
`SED: begin df <= 1'b1; end
|
`CLD: df <= 1'b0;
|
`SEI: begin im <= 1'b1; end
|
`SED: df <= 1'b1;
|
`WAI: begin wai <= 1'b1; end
|
`SEI: im <= 1'b1;
|
`EMM: begin em <= 1'b1; end
|
`WAI: wai <= 1'b1;
|
|
`EMM: em <= 1'b1;
|
`DEX: begin
|
`DEX: begin
|
res <= x - 32'd1;
|
res <= x - 32'd1;
|
// DEX/BNE accelerator
|
// DEX/BNE accelerator
|
// if (ir[15:8]==`BNE) begin
|
// if (ir[15:8]==`BNE) begin
|
// if (x!=32'd1) begin
|
// if (x!=32'd1) begin
|
| Line 63... |
Line 67... |
// else
|
// else
|
// pc <= pcp3;
|
// pc <= pcp3;
|
// end
|
// end
|
// end
|
// end
|
end
|
end
|
`INX: begin res <= x + 32'd1; end
|
`INX: res <= x + 32'd1;
|
`DEY: begin res <= y - 32'd1; end
|
`DEY: res <= y - 32'd1;
|
`INY: begin res <= y + 32'd1; end
|
`INY: res <= y + 32'd1;
|
`DEA: begin res <= acc - 32'd1; end
|
`DEA: res <= acc - 32'd1;
|
`INA: begin res <= acc + 32'd1; end
|
`INA: res <= acc + 32'd1;
|
`TSX,`TSA: begin res <= isp; end
|
`TSX,`TSA: res <= isp;
|
`TXS,`TXA,`TXY: begin res <= x; end
|
`TXS,`TXA,`TXY: res <= x;
|
`TAX,`TAY,`TAS: begin res <= acc; end
|
`TAX,`TAY,`TAS: res <= acc;
|
`TYA,`TYX: begin res <= y; end
|
`TYA,`TYX: res <= y;
|
`TRS: begin
|
`TRS: res <= rfoa;
|
res <= rfoa; pc <= pcp2; end
|
|
`TSR: begin
|
`TSR: begin
|
Rt <= ir[15:12];
|
Rt <= ir[15:12];
|
case(ir[11:8])
|
case(ir[11:8])
|
4'h0: res <= {write_allocate,dcacheOn,icacheOn};
|
4'h0:
|
4'h1: res <= dp;
|
begin
|
|
`ifdef SUPPORT_ICACHE
|
|
res[0] <= icacheOn;
|
|
`endif
|
|
`ifdef SUPPORT_DCACHE
|
|
res[1] <= dcacheOn;
|
|
res[2] <= write_allocate;
|
|
`endif
|
|
res[31:3] <= 29'd0;
|
|
end
|
4'h2: res <= prod[31:0];
|
4'h2: res <= prod[31:0];
|
4'h3: res <= prod[63:32];
|
4'h3: res <= prod[63:32];
|
4'h4: res <= tick;
|
4'h4: res <= tick;
|
4'h5: begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
|
4'h5: begin res <= lfsr; lfsr <= {lfsr[30:0],lfsr_fb}; end
|
4'h6: res <= dp8;
|
4'h7: begin res <= history_buf[history_ndx]; history_ndx <= history_ndx + 6'd1; end// was abs8
|
4'h7: res <= abs8;
|
|
4'h8: res <= {vbr[31:1],nmoi};
|
4'h8: res <= {vbr[31:1],nmoi};
|
4'h9: res <= derr_address;
|
4'h9: res <= derr_address;
|
4'hE: res <= {spage[31:8],sp};
|
4'hE: res <= {spage[31:8],sp};
|
4'hF: res <= isp;
|
4'hF: res <= isp;
|
|
default: res <= 32'd0;
|
endcase
|
endcase
|
pc <= pcp2;
|
|
end
|
end
|
`ASL_ACC: begin res <= {acc,1'b0}; end
|
`ASL_ACC: begin res <= {acc,1'b0}; end
|
`ROL_ACC: begin res <= {acc,cf};end
|
`ROL_ACC: begin res <= {acc,cf};end
|
`LSR_ACC: begin res <= {acc[0],1'b0,acc[31:1]}; end
|
`LSR_ACC: begin res <= {acc[0],1'b0,acc[31:1]}; end
|
`ROR_ACC: begin res <= {acc[0],cf,acc[31:1]}; end
|
`ROR_ACC: begin res <= {acc[0],cf,acc[31:1]}; end
|
|
|
`RR:
|
`RR:
|
begin
|
begin
|
state <= IFETCH;
|
state <= IFETCH;
|
|
Rt <= ir[19:16];
|
case(ir[23:20])
|
case(ir[23:20])
|
`ADD_RR: begin res <= rfoa + rfob + {31'b0,df&cf}; a <= rfoa; b <= rfob; end
|
`ADD_RR: begin res <= rfoa + rfob + {31'b0,df&cf}; b <= rfob; end
|
`SUB_RR: begin res <= rfoa - rfob - {31'b0,df&~cf&|ir[19:16]}; a <= rfoa; b <= rfob; end
|
`SUB_RR: begin res <= rfoa - rfob - {31'b0,df&~cf&|ir[19:16]}; b <= rfob; end
|
`AND_RR: begin res <= rfoa & rfob; a <= rfoa; b <= rfob; end // for bit flags
|
`AND_RR: begin res <= rfoa & rfob; b <= rfob; end // for bit flags
|
`OR_RR: begin res <= rfoa | rfob; a <= rfoa; b <= rfob; end
|
`OR_RR: begin res <= rfoa | rfob; b <= rfob; end
|
`EOR_RR: begin res <= rfoa ^ rfob; a <= rfoa; b <= rfob; end
|
`EOR_RR: begin res <= rfoa ^ rfob; b <= rfob; end
|
`MUL_RR: begin state <= MULDIV1; end
|
`MUL_RR: begin state <= MULDIV1; end
|
`MULS_RR: begin state <= MULDIV1; end
|
`MULS_RR: begin state <= MULDIV1; end
|
|
`ifdef SUPPORT_DIVMOD
|
`DIV_RR: begin state <= MULDIV1; end
|
`DIV_RR: begin state <= MULDIV1; end
|
`DIVS_RR: begin state <= MULDIV1; end
|
`DIVS_RR: begin state <= MULDIV1; end
|
`MOD_RR: begin state <= MULDIV1; end
|
`MOD_RR: begin state <= MULDIV1; end
|
`MODS_RR: begin state <= MULDIV1; end
|
`MODS_RR: begin state <= MULDIV1; end
|
`ASL_RRR: begin a <= rfoa; b <= rfob; state <= CALC; end
|
`endif
|
`LSR_RRR: begin a <= rfoa; b <= rfob; state <= CALC; end
|
`ifdef SUPPORT_SHIFT
|
|
`ASL_RRR: begin b <= rfob; state <= CALC; end
|
|
`LSR_RRR: begin b <= rfob; state <= CALC; end
|
|
`endif
|
|
default:
|
|
begin
|
|
Rt <= 4'h0;
|
|
ir <= {8{`BRK}};
|
|
hwi <= `TRUE;
|
|
vect <= {vbr[31:9],9'd495,2'b00};
|
|
pc <= pc; // override the pc increment
|
|
state <= DECODE;
|
|
end
|
endcase
|
endcase
|
Rt <= ir[19:16];
|
|
pc <= pcp3;
|
|
end
|
end
|
`LD_RR: begin res <= rfoa; Rt <= ir[15:12]; pc <= pcp2; end
|
`LD_RR: begin res <= rfoa; Rt <= ir[15:12]; end
|
`ASL_RR: begin res <= {rfoa,1'b0}; pc <= pcp2; Rt <= ir[15:12]; end
|
`ASL_RR: begin res <= {rfoa,1'b0}; Rt <= ir[15:12]; end
|
`ROL_RR: begin res <= {rfoa,cf}; pc <= pcp2; Rt <= ir[15:12]; end
|
`ROL_RR: begin res <= {rfoa,cf}; Rt <= ir[15:12]; end
|
`LSR_RR: begin res <= {rfoa[0],1'b0,rfoa[31:1]}; pc <= pcp2; Rt <= ir[15:12]; end
|
`LSR_RR: begin res <= {rfoa[0],1'b0,rfoa[31:1]}; Rt <= ir[15:12]; end
|
`ROR_RR: begin res <= {rfoa[0],cf,rfoa[31:1]}; pc <= pcp2; Rt <= ir[15:12]; end
|
`ROR_RR: begin res <= {rfoa[0],cf,rfoa[31:1]}; Rt <= ir[15:12]; end
|
`DEC_RR: begin res <= rfoa - 32'd1; pc <= pcp2; Rt <= ir[15:12]; end
|
`DEC_RR: begin res <= rfoa - 32'd1; Rt <= ir[15:12]; end
|
`INC_RR: begin res <= rfoa + 32'd1; pc <= pcp2; Rt <= ir[15:12]; end
|
`INC_RR: begin res <= rfoa + 32'd1; Rt <= ir[15:12]; end
|
|
|
`ADD_IMM8: begin res <= rfoa + {{24{ir[23]}},ir[23:16]} + {31'b0,df&cf}; Rt <= ir[15:12]; pc <= pcp3; a <= rfoa; b <= {{24{ir[23]}},ir[23:16]}; end
|
`ADD_IMM8: begin res <= rfoa + {{24{ir[23]}},ir[23:16]} + {31'b0,df&cf}; Rt <= ir[15:12]; b <= {{24{ir[23]}},ir[23:16]}; end
|
`SUB_IMM8: begin res <= rfoa - {{24{ir[23]}},ir[23:16]} - {31'b0,df&~cf&|ir[15:12]}; Rt <= ir[15:12]; pc <= pcp3; a <= rfoa; b <= {{24{ir[23]}},ir[23:16]}; end
|
`SUB_IMM8: begin res <= rfoa - {{24{ir[23]}},ir[23:16]} - {31'b0,df&~cf&|ir[15:12]}; Rt <= ir[15:12]; b <= {{24{ir[23]}},ir[23:16]}; end
|
`OR_IMM8: begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pcp3; b <= {{24{ir[23]}},ir[23:16]}; end
|
`OR_IMM8: begin res <= rfoa | {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; end
|
`AND_IMM8: begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pcp3; b <= {{24{ir[23]}},ir[23:16]}; end
|
`AND_IMM8: begin res <= rfoa & {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; b <= {{24{ir[23]}},ir[23:16]}; end
|
`EOR_IMM8: begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; pc <= pcp3; b <= {{24{ir[23]}},ir[23:16]}; end
|
`EOR_IMM8: begin res <= rfoa ^ {{24{ir[23]}},ir[23:16]}; Rt <= ir[15:12]; end
|
`CMP_IMM8: begin res <= acc - {{24{ir[15]}},ir[15:8]}; Rt <= 4'h0; pc <= pcp2; b <= {{24{ir[15]}},ir[15:8]}; end
|
`CMP_IMM8: begin res <= acc - {{24{ir[15]}},ir[15:8]}; end
|
`ASL_IMM8: begin a <= rfoa; b <= ir[20:16]; Rt <= ir[15:12]; pc <= pcp3; state <= CALC; end
|
`ifdef SUPPORT_SHIFT
|
`LSR_IMM8: begin a <= rfoa; b <= ir[20:16]; Rt <= ir[15:12]; pc <= pcp3; state <= CALC; end
|
`ASL_IMM8: begin b <= ir[20:16]; Rt <= ir[15:12]; state <= CALC; end
|
|
`LSR_IMM8: begin b <= ir[20:16]; Rt <= ir[15:12]; state <= CALC; end
|
|
`endif
|
|
`ADD_IMM16: begin res <= rfoa + {{16{ir[31]}},ir[31:16]} + {31'b0,df&cf}; Rt <= ir[15:12]; b <= {{16{ir[31]}},ir[31:16]}; end
|
|
`SUB_IMM16: begin res <= rfoa - {{16{ir[31]}},ir[31:16]} - {31'b0,df&~cf&|ir[15:12]}; Rt <= ir[15:12]; b <= {{16{ir[31]}},ir[31:16]}; end
|
|
`OR_IMM16: begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; end
|
|
`AND_IMM16: begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; b <= {{16{ir[31]}},ir[31:16]}; end
|
|
`EOR_IMM16: begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; end
|
|
|
`ADD_IMM16: begin res <= rfoa + {{16{ir[31]}},ir[31:16]} + {31'b0,df&cf}; Rt <= ir[15:12]; pc <= pcp4; a <= rfoa; b <= {{16{ir[31]}},ir[31:16]}; end
|
`ADD_IMM32: begin res <= rfoa + ir[47:16] + {31'b0,df&cf}; Rt <= ir[15:12]; b <= ir[47:16]; end
|
`SUB_IMM16: begin res <= rfoa - {{16{ir[31]}},ir[31:16]} - {31'b0,df&~cf&|ir[15:12]}; Rt <= ir[15:12]; pc <= pcp4; a <= rfoa; b <= {{16{ir[31]}},ir[31:16]}; end
|
`SUB_IMM32: begin res <= rfoa - ir[47:16] - {31'b0,df&~cf&|ir[15:12]}; Rt <= ir[15:12]; b <= ir[47:16]; end
|
`OR_IMM16: begin res <= rfoa | {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pcp4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`OR_IMM32: begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; end
|
`AND_IMM16: begin res <= rfoa & {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pcp4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`AND_IMM32: begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; b <= ir[47:16]; end
|
`EOR_IMM16: begin res <= rfoa ^ {{16{ir[31]}},ir[31:16]}; Rt <= ir[15:12]; pc <= pcp4; b <= {{16{ir[31]}},ir[31:16]}; end
|
`EOR_IMM32: begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; end
|
|
|
`ADD_IMM32: begin res <= rfoa + ir[47:16]; Rt <= ir[15:12] + {31'b0,df&cf}; pc <= pcp6; a <= rfoa; b <= ir[47:16]; end
|
`LDX_IMM32,`LDY_IMM32,`LDA_IMM32: res <= ir[39:8];
|
`SUB_IMM32: begin res <= rfoa - ir[47:16]; Rt <= ir[15:12] - {31'b0,df&~cf&|ir[15:12]}; pc <= pcp6; a <= rfoa; b <= ir[47:16]; end
|
`LDX_IMM16,`LDA_IMM16: res <= {{16{ir[23]}},ir[23:8]};
|
`OR_IMM32: begin res <= rfoa | ir[47:16]; Rt <= ir[15:12]; pc <= pcp6; b <= ir[47:16]; end
|
`LDX_IMM8,`LDA_IMM8: res <= {{24{ir[15]}},ir[15:8]};
|
`AND_IMM32: begin res <= rfoa & ir[47:16]; Rt <= ir[15:12]; pc <= pcp6; b <= ir[47:16]; end
|
|
`EOR_IMM32: begin res <= rfoa ^ ir[47:16]; Rt <= ir[15:12]; pc <= pcp6; b <= ir[47:16]; end
|
|
|
|
`LDX_IMM32,`LDY_IMM32,`LDA_IMM32: begin res <= ir[39:8]; pc <= pcp5; end
|
`SUB_SP8: res <= isp - {{24{ir[15]}},ir[15:8]};
|
`LDX_IMM16,`LDA_IMM16: begin res <= {{16{ir[23]}},ir[23:8]}; pc <= pcp3; end
|
`SUB_SP16: res <= isp - {{16{ir[23]}},ir[23:8]};
|
`LDX_IMM8,`LDA_IMM8: begin res <= {{24{ir[15]}},ir[15:8]}; pc <= pcp2; end
|
`SUB_SP32: res <= isp - ir[39:8];
|
|
|
`SUB_SP8: begin res <= isp - {{24{ir[15]}},ir[15:8]}; pc <= pcp2; end
|
`CPX_IMM32: res <= x - ir[39:8];
|
`SUB_SP16: begin res <= isp - {{16{ir[23]}},ir[23:8]}; pc <= pcp3; end
|
`CPY_IMM32: res <= y - ir[39:8];
|
`SUB_SP32: begin res <= isp - ir[39:8]; pc <= pcp5; end
|
|
|
|
`LDX_ZPX,`LDY_ZPX:
|
`LDX_ZPX,`LDY_ZPX:
|
begin
|
begin
|
radr <= zpx32xy_address;
|
radr <= zpx32xy_address;
|
pc <= pcp3;
|
|
load_what <= `WORD_311;
|
load_what <= `WORD_311;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ORB_ZPX:
|
`ORB_ZPX:
|
begin
|
begin
|
a <= rfoa;
|
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
radr <= zpx32_address[31:2];
|
radr <= zpx32_address[31:2];
|
radr2LSB <= zpx32_address[1:0];
|
radr2LSB <= zpx32_address[1:0];
|
pc <= pcp4;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`LDX_ABS,`LDY_ABS:
|
`LDX_ABS,`LDY_ABS:
|
begin
|
begin
|
radr <= ir[39:8];
|
radr <= ir[39:8];
|
pc <= pcp5;
|
|
load_what <= `WORD_311;
|
load_what <= `WORD_311;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ORB_ABS:
|
`ORB_ABS:
|
begin
|
begin
|
a <= rfoa;
|
|
Rt <= ir[15:12];
|
Rt <= ir[15:12];
|
radr <= ir[47:18];
|
radr <= ir[47:18];
|
radr2LSB <= ir[17:16];
|
radr2LSB <= ir[17:16];
|
pc <= pcp6;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`LDX_ABSY,`LDY_ABSX:
|
`LDX_ABSY,`LDY_ABSX:
|
begin
|
begin
|
radr <= absx32xy_address;
|
radr <= absx32xy_address;
|
pc <= pcp6;
|
|
load_what <= `WORD_311;
|
load_what <= `WORD_311;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ORB_ABSX:
|
`ORB_ABSX:
|
begin
|
begin
|
a <= rfoa;
|
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
radr <= absx32_address[31:2];
|
radr <= absx32_address[31:2];
|
radr2LSB <= absx32_address[1:0];
|
radr2LSB <= absx32_address[1:0];
|
pc <= pcp7;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ST_ZPX:
|
`ST_ZPX:
|
begin
|
begin
|
wadr <= zpx32_address;
|
wadr <= zpx32_address;
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
pc <= pcp4;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STB_ZPX:
|
`STB_ZPX:
|
begin
|
begin
|
wadr <= zpx32_address[31:2];
|
wadr <= zpx32_address[31:2];
|
wadr2LSB <= zpx32_address[1:0];
|
wadr2LSB <= zpx32_address[1:0];
|
wdat <= {4{rfoa[7:0]}};
|
store_what <= `STW_RFA8;
|
pc <= pcp4;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`ST_DSP:
|
`ST_DSP:
|
begin
|
begin
|
wadr <= {{24{ir[23]}},ir[23:16]} + isp;
|
wadr <= {{24{ir[23]}},ir[23:16]} + isp;
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
pc <= pcp3;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`ST_ABS:
|
`ST_ABS:
|
begin
|
begin
|
wadr <= ir[47:16];
|
wadr <= ir[47:16];
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
pc <= pcp6;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STB_ABS:
|
`STB_ABS:
|
begin
|
begin
|
wadr <= ir[47:18];
|
wadr <= ir[47:18];
|
wadr2LSB <= ir[17:16];
|
wadr2LSB <= ir[17:16];
|
wdat <= {4{rfoa[7:0]}};
|
store_what <= `STW_RFA8;
|
pc <= pcp6;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`ST_ABSX:
|
`ST_ABSX:
|
begin
|
begin
|
wadr <= absx32_address;
|
wadr <= absx32_address;
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
pc <= pcp7;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STB_ABSX:
|
`STB_ABSX:
|
begin
|
begin
|
wadr <= absx32_address[31:2];
|
wadr <= absx32_address[31:2];
|
wadr2LSB <= absx32_address[1:0];
|
wadr2LSB <= absx32_address[1:0];
|
wdat <= {4{rfoa[7:0]}};
|
store_what <= `STW_RFA8;
|
pc <= pcp7;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STX_ZPX:
|
`STX_ZPX:
|
begin
|
begin
|
wadr <= dp + ir[23:12] + rfoa;
|
wadr <= zpx32xy_address;
|
wdat <= x;
|
store_what <= `STW_X;
|
pc <= pcp3;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STX_ABS:
|
`STX_ABS:
|
begin
|
begin
|
wadr <= ir[39:8];
|
wadr <= ir[39:8];
|
wdat <= x;
|
store_what <= `STW_X;
|
pc <= pcp5;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STY_ZPX:
|
`STY_ZPX:
|
begin
|
begin
|
wadr <= dp + ir[23:12] + rfoa;
|
wadr <= zpx32xy_address;
|
wdat <= y;
|
store_what <= `STW_Y;
|
pc <= pcp3;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`STY_ABS:
|
`STY_ABS:
|
begin
|
begin
|
wadr <= ir[39:8];
|
wadr <= ir[39:8];
|
wdat <= y;
|
store_what <= `STW_Y;
|
pc <= pcp5;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`ADD_ZPX,`SUB_ZPX,`OR_ZPX,`AND_ZPX,`EOR_ZPX:
|
`ADD_ZPX,`SUB_ZPX,`OR_ZPX,`AND_ZPX,`EOR_ZPX:
|
begin
|
begin
|
a <= rfoa;
|
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
radr <= zpx32_address;
|
radr <= zpx32_address;
|
pc <= pcp4;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ASL_ZPX,`ROL_ZPX,`LSR_ZPX,`ROR_ZPX,`INC_ZPX,`DEC_ZPX:
|
`ASL_ZPX,`ROL_ZPX,`LSR_ZPX,`ROR_ZPX,`INC_ZPX,`DEC_ZPX:
|
begin
|
begin
|
radr <= dp + rfoa + ir[23:12];
|
radr <= zpx32xy_address;
|
pc <= pcp3;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ADD_DSP,`SUB_DSP,`OR_DSP,`AND_DSP,`EOR_DSP:
|
`ADD_DSP,`SUB_DSP,`OR_DSP,`AND_DSP,`EOR_DSP:
|
begin
|
begin
|
a <= rfoa;
|
|
Rt <= ir[15:12];
|
Rt <= ir[15:12];
|
radr <= {{24{ir[23]}},ir[23:16]} + isp;
|
radr <= {{24{ir[23]}},ir[23:16]} + isp;
|
pc <= pcp3;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ADD_IX,`SUB_IX,`OR_IX,`AND_IX,`EOR_IX,`ST_IX:
|
`ADD_IX,`SUB_IX,`OR_IX,`AND_IX,`EOR_IX,`ST_IX:
|
begin
|
begin
|
a <= rfoa;
|
|
if (ir[7:0]!=`ST_IX) // for ST_IX, Rt=0
|
if (ir[7:0]!=`ST_IX) // for ST_IX, Rt=0
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
pc <= pcp4;
|
radr <= zpx32_address;
|
radr <= dp + ir[31:20] + rfob;
|
|
load_what <= `IA_310;
|
load_what <= `IA_310;
|
|
store_what <= `STW_A;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ADD_RIND,`SUB_RIND,`OR_RIND,`AND_RIND,`EOR_RIND:
|
`ADD_RIND,`SUB_RIND,`OR_RIND,`AND_RIND,`EOR_RIND:
|
begin
|
begin
|
radr <= rfob;
|
radr <= rfob;
|
a <= rfoa;
|
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
pc <= pcp3;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ST_RIND:
|
`ST_RIND:
|
begin
|
begin
|
wadr <= rfob;
|
wadr <= rfob;
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
pc <= pcp2;
|
|
state <= STORE1;
|
state <= STORE1;
|
end
|
end
|
`ADD_IY,`SUB_IY,`OR_IY,`AND_IY,`EOR_IY,`ST_IY:
|
`ADD_IY,`SUB_IY,`OR_IY,`AND_IY,`EOR_IY,`ST_IY:
|
begin
|
begin
|
a <= rfoa;
|
|
if (ir[7:0]!=`ST_IY) // for ST_IY, Rt=0
|
if (ir[7:0]!=`ST_IY) // for ST_IY, Rt=0
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
pc <= pcp4;
|
|
isIY <= 1'b1;
|
isIY <= 1'b1;
|
radr <= dp + ir[31:20];
|
radr <= ir[31:20];
|
load_what <= `IA_310;
|
load_what <= `IA_310;
|
|
store_what <= `STW_A;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ADD_ABS,`SUB_ABS,`OR_ABS,`AND_ABS,`EOR_ABS:
|
`ADD_ABS,`SUB_ABS,`OR_ABS,`AND_ABS,`EOR_ABS:
|
begin
|
begin
|
a <= rfoa;
|
|
radr <= ir[47:16];
|
radr <= ir[47:16];
|
Rt <= ir[15:12];
|
Rt <= ir[15:12];
|
pc <= pcp6;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ASL_ABS,`ROL_ABS,`LSR_ABS,`ROR_ABS,`INC_ABS,`DEC_ABS:
|
`ASL_ABS,`ROL_ABS,`LSR_ABS,`ROR_ABS,`INC_ABS,`DEC_ABS:
|
begin
|
begin
|
radr <= ir[39:8];
|
radr <= ir[39:8];
|
pc <= pcp5;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ADD_ABSX,`SUB_ABSX,`OR_ABSX,`AND_ABSX,`EOR_ABSX:
|
`ADD_ABSX,`SUB_ABSX,`OR_ABSX,`AND_ABSX,`EOR_ABSX:
|
begin
|
begin
|
a <= rfoa;
|
radr <= absx32_address;
|
radr <= ir[55:24] + rfob;
|
|
Rt <= ir[19:16];
|
Rt <= ir[19:16];
|
pc <= pcp7;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`ASL_ABSX,`ROL_ABSX,`LSR_ABSX,`ROR_ABSX,`INC_ABSX,`DEC_ABSX:
|
`ASL_ABSX,`ROL_ABSX,`LSR_ABSX,`ROR_ABSX,`INC_ABSX,`DEC_ABSX:
|
begin
|
begin
|
radr <= ir[47:16] + rfob;
|
radr <= absx32xy_address;
|
pc <= pcp6;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`CPX_IMM32:
|
|
begin
|
|
res <= x - ir[39:8];
|
|
pc <= pcp5;
|
|
state <= IFETCH;
|
|
end
|
|
`CPY_IMM32:
|
|
begin
|
|
res <= y - ir[39:8];
|
|
pc <= pcp5;
|
|
state <= IFETCH;
|
|
end
|
|
`CPX_ZPX:
|
`CPX_ZPX:
|
begin
|
begin
|
radr <= dp + ir[23:12] + rfoa;
|
radr <= zpx32xy_address;
|
pc <= pcp3;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`CPY_ZPX:
|
`CPY_ZPX:
|
begin
|
begin
|
radr <= dp + ir[23:12] + rfoa;
|
radr <= zpx32xy_address;
|
pc <= pcp3;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`CPX_ABS:
|
`CPX_ABS:
|
begin
|
begin
|
radr <= ir[39:8];
|
radr <= ir[39:8];
|
pc <= pcp5;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`CPY_ABS:
|
`CPY_ABS:
|
begin
|
begin
|
radr <= ir[39:8];
|
radr <= ir[39:8];
|
pc <= pcp5;
|
|
load_what <= `WORD_310;
|
load_what <= `WORD_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`BRK:
|
`BRK:
|
begin
|
begin
|
bf <= 1'b1;
|
bf <= !hwi;
|
|
hist_capture <= `FALSE;
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= pc+2;
|
isp <= isp_dec;
|
cyc_o <= 1'b1;
|
store_what <= `STW_PCHWI;
|
stb_o <= 1'b1;
|
state <= STORE1;
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= pc+2;
|
|
vect <= {vbr[31:9],`BRK_VECTNO,2'b00};
|
|
state <= IRQ1;
|
|
end
|
end
|
`INT0,`INT1:
|
`INT0,`INT1:
|
begin
|
begin
|
radr <= isp_dec;
|
ir <= {8{`BRK}};
|
wadr <= isp_dec;
|
|
wdat <= pc + 32'd2;
|
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= pc + 32'd2;
|
|
vect <= {vbr[31:9],ir[15:7],2'b00};
|
vect <= {vbr[31:9],ir[15:7],2'b00};
|
state <= IRQ1;
|
state <= DECODE;
|
end
|
end
|
`JMP:
|
`JMP:
|
begin
|
begin
|
pc[15:0] <= ir[23:8];
|
pc[15:0] <= ir[23:8];
|
state <= IFETCH;
|
state <= IFETCH;
|
| Line 482... |
Line 445... |
end
|
end
|
`JSR:
|
`JSR:
|
begin
|
begin
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
isp <= isp_dec;
|
cyc_o <= 1'b1;
|
store_what <= `STW_DEF;
|
stb_o <= 1'b1;
|
wdat <= pc+{31'd1,suppress_pcinc[0]};
|
we_o <= 1'b1;
|
pc <= {pc[31:16],ir[23:8]};
|
sel_o <= 4'hF;
|
state <= STORE1;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
|
vect <= {pc[31:16],ir[23:8]};
|
|
state <= JSR1;
|
|
end
|
end
|
`JSR_RIND:
|
`JSR_RIND:
|
begin
|
begin
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= pc + 32'd2;
|
wdat <= pc + 32'd2;
|
cyc_o <= 1'b1;
|
isp <= isp_dec;
|
stb_o <= 1'b1;
|
store_what <= `STW_DEF;
|
we_o <= 1'b1;
|
pc <= rfoa;
|
sel_o <= 4'hF;
|
state <= STORE1;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= pc + 32'd2;
|
|
vect <= rfoa;
|
|
state <= JSR1;
|
|
$stop;
|
|
end
|
end
|
`JSL:
|
`JSL:
|
begin
|
begin
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
|
isp <= isp_dec;
|
|
store_what <= `STW_DEF;
|
wdat <= suppress_pcinc[0] ? pc + 32'd5 : pc + 32'd2;
|
wdat <= suppress_pcinc[0] ? pc + 32'd5 : pc + 32'd2;
|
cyc_o <= 1'b1;
|
pc <= ir[39:8];
|
stb_o <= 1'b1;
|
state <= STORE1;
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= suppress_pcinc[0] ? pc + 32'd5 : pc + 32'd2;
|
|
vect <= ir[39:8];
|
|
state <= JSR1;
|
|
end
|
end
|
`BSR:
|
`BSR:
|
begin
|
begin
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
isp <= isp_dec;
|
cyc_o <= 1'b1;
|
store_what <= `STW_DEF;
|
stb_o <= 1'b1;
|
wdat <= pc+{31'd1,suppress_pcinc[0]};
|
we_o <= 1'b1;
|
pc <= pc + {{16{ir[23]}},ir[23:8]};
|
sel_o <= 4'hF;
|
state <= STORE1;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
|
vect <= pc + {{16{ir[23]}},ir[23:8]};
|
|
state <= JSR1;
|
|
end
|
end
|
`JSR_INDX:
|
`JSR_INDX:
|
begin
|
begin
|
radr <= isp - 32'd1;
|
radr <= isp_dec;
|
wadr <= isp - 32'd1;
|
wadr <= isp_dec;
|
wdat <= suppress_pcinc[0] ? pc + 32'd5 : pc + 32'd2;
|
wdat <= suppress_pcinc[0] ? pc + 32'd5 : pc + 32'd2;
|
cyc_o <= 1'b1;
|
cyc_o <= 1'b1;
|
stb_o <= 1'b1;
|
stb_o <= 1'b1;
|
we_o <= 1'b1;
|
we_o <= 1'b1;
|
sel_o <= 4'hF;
|
sel_o <= 4'hF;
|
| Line 568... |
Line 514... |
radr <= isp;
|
radr <= isp;
|
load_what <= `PC_310;
|
load_what <= `PC_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`RTI: begin
|
`RTI: begin
|
|
hist_capture <= `TRUE;
|
radr <= isp;
|
radr <= isp;
|
load_what <= `SR_310;
|
load_what <= `SR_310;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
end
|
end
|
`BEQ,`BNE,`BPL,`BMI,`BCC,`BCS,`BVC,`BVS,`BRA:
|
`BEQ,`BNE,`BPL,`BMI,`BCC,`BCS,`BVC,`BVS,`BRA,
|
|
`BGT,`BGE,`BLT,`BLE,`BHI,`BLS:
|
begin
|
begin
|
state <= IFETCH;
|
state <= IFETCH;
|
if (ir[15:8]==8'h00) begin
|
if (ir[15:8]==8'h00) begin
|
radr <= isp_dec;
|
ir <= {8{`BRK}};
|
wadr <= isp_dec;
|
pc <= pc; // override the pc increment
|
wdat <= pc + 32'd2;
|
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= pc + 32'd2;
|
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
state <= IRQ1;
|
state <= DECODE;
|
end
|
end
|
else if (ir[15:8]==8'h1) begin
|
else if (ir[15:8]==8'h1) begin
|
if (takb)
|
if (takb)
|
pc <= pc + {{16{ir[31]}},ir[31:16]};
|
pc <= pc + {{16{ir[31]}},ir[31:16]};
|
else
|
else
|
| Line 601... |
Line 542... |
pc <= pc + {{24{ir[15]}},ir[15:8]};
|
pc <= pc + {{24{ir[15]}},ir[15:8]};
|
else
|
else
|
pc <= pcp2;
|
pc <= pcp2;
|
end
|
end
|
end
|
end
|
/* `BEQ_RR:
|
|
begin
|
|
state <= IFETCH;
|
|
if (ir[23:16]==8'h00) begin
|
|
radr <= isp_dec;
|
|
wadr <= isp_dec;
|
|
wdat <= pc + 32'd2;
|
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= pc + 32'd2;
|
|
vect <= `SLP_VECT;
|
|
state <= IRQ1;
|
|
end
|
|
else if (ir[23:16]==8'h1) begin
|
|
if (rfoa==rfob)
|
|
pc <= pc + {{16{ir[39]}},ir[39:24]};
|
|
else
|
|
pc <= pc + 32'd5;
|
|
end
|
|
else begin
|
|
if (takb)
|
|
pc <= pc + {{24{ir[23]}},ir[23:16]};
|
|
else
|
|
pc <= pc + 32'd3;
|
|
end
|
|
end*/
|
|
`BRL:
|
`BRL:
|
begin
|
begin
|
if (ir[23:8]==16'h0000) begin
|
if (ir[23:8]==16'h0000) begin
|
radr <= isp_dec;
|
ir <= {8{`BRK}};
|
wadr <= isp_dec;
|
|
wdat <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= suppress_pcinc[0] ? pc + 32'd3 : pc + 32'd2;
|
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
vect <= {vbr[31:9],`SLP_VECTNO,2'b00};
|
state <= IRQ1;
|
pc <= pc; // override the pc increment
|
|
state <= DECODE;
|
end
|
end
|
else begin
|
else begin
|
pc <= pc + {{16{ir[23]}},ir[23:8]};
|
pc <= pc + {{16{ir[23]}},ir[23:8]};
|
state <= IFETCH;
|
state <= IFETCH;
|
end
|
end
|
end
|
end
|
|
`ifdef SUPPORT_EXEC
|
`EXEC,`ATNI:
|
`EXEC,`ATNI:
|
begin
|
begin
|
exbuf[31:0] <= rfoa;
|
exbuf[31:0] <= rfoa;
|
exbuf[63:32] <= rfob;
|
exbuf[63:32] <= rfob;
|
pc <= pc + 32'd2;
|
|
state <= IFETCH;
|
state <= IFETCH;
|
end
|
end
|
|
`endif
|
`PHP:
|
`PHP:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
we_o <= 1'b1;
|
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= sr;
|
store_what <= `STW_SR;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= sr;
|
|
isp <= isp_dec;
|
isp <= isp_dec;
|
state <= STORE2;
|
state <= STORE1;
|
end
|
end
|
`PHA:
|
`PHA:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
we_o <= 1'b1;
|
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= acc;
|
store_what <= `STW_ACC;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= acc;
|
|
isp <= isp_dec;
|
isp <= isp_dec;
|
state <= STORE2;
|
state <= STORE1;
|
end
|
end
|
`PHX:
|
`PHX:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
we_o <= 1'b1;
|
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= x;
|
store_what <= `STW_X;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= x;
|
|
isp <= isp_dec;
|
isp <= isp_dec;
|
state <= STORE2;
|
state <= STORE1;
|
end
|
end
|
`PHY:
|
`PHY:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
we_o <= 1'b1;
|
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= y;
|
store_what <= `STW_Y;
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= y;
|
|
isp <= isp_dec;
|
isp <= isp_dec;
|
state <= STORE2;
|
state <= STORE1;
|
end
|
end
|
`PUSH:
|
`PUSH:
|
begin
|
begin
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
we_o <= 1'b1;
|
|
radr <= isp_dec;
|
radr <= isp_dec;
|
wadr <= isp_dec;
|
wadr <= isp_dec;
|
wdat <= rfoa;
|
store_what <= `STW_RFA;
|
adr_o <= {isp_dec,2'b00};
|
state <= STORE1;
|
dat_o <= rfoa;
|
|
state <= STORE2;
|
|
isp <= isp_dec;
|
isp <= isp_dec;
|
pc <= pcp2;
|
|
end
|
end
|
`PLP:
|
`PLP:
|
begin
|
begin
|
radr <= isp;
|
radr <= isp;
|
load_what <= `SR_310;
|
load_what <= `SR_310;
|
| Line 748... |
Line 623... |
Rt <= ir[15:12];
|
Rt <= ir[15:12];
|
radr <= isp;
|
radr <= isp;
|
isp <= isp_inc;
|
isp <= isp_inc;
|
load_what <= `WORD_311;
|
load_what <= `WORD_311;
|
state <= LOAD_MAC1;
|
state <= LOAD_MAC1;
|
pc <= pcp2;
|
|
end
|
end
|
// `MVN: state <= MVN1;
|
`ifdef SUPPORT_STRING
|
// `MVP: state <= MVP1;
|
`MVN: state <= MVN1;
|
|
`MVP: state <= MVP1;
|
|
`STS: state <= STS1;
|
|
`endif
|
default: // unimplemented opcode
|
default: // unimplemented opcode
|
begin
|
begin
|
radr <= isp_dec;
|
res <= 32'd0;
|
wadr <= isp_dec;
|
ir <= {8{`BRK}};
|
wdat <= suppress_pcinc[0] ? pc + 32'd1 : pc + 32'd2;
|
hwi <= `TRUE;
|
cyc_o <= 1'b1;
|
|
stb_o <= 1'b1;
|
|
we_o <= 1'b1;
|
|
sel_o <= 4'hF;
|
|
adr_o <= {isp_dec,2'b00};
|
|
dat_o <= suppress_pcinc[0] ? pc + 32'd1 : pc + 32'd2;
|
|
vect <= {vbr[31:9],9'd495,2'b00};
|
vect <= {vbr[31:9],9'd495,2'b00};
|
state <= IRQ1;
|
pc <= pc; // override the pc increment
|
|
state <= DECODE;
|
end
|
end
|
endcase
|
endcase
|
end
|
end
|
|
|
No newline at end of file
|
No newline at end of file
|
