| Line 20... |
Line 20... |
//
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//
|
// ============================================================================
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// ============================================================================
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//
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//
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IFETCH:
|
IFETCH:
|
begin
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begin
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if (em)
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vect <= `BYTE_IRQ_VECT;
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else
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vect <= {vbr[31:9],`BRK_VECTNO,2'b00};
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suppress_pcinc <= 4'hF; // default: no suppression of increment
|
suppress_pcinc <= 4'hF; // default: no suppression of increment
|
opc <= pc;
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opc <= pc;
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hwi <= `FALSE;
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hwi <= `FALSE;
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store_what <= `STW_DEF;
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if (nmi_edge & !imiss & gie & !isExec & !isAtni) begin // imiss indicates cache controller is active and this state is in a waiting loop
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if (nmi_edge & !imiss & gie & !isExec & !isAtni) begin // imiss indicates cache controller is active and this state is in a waiting loop
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ir <= 64'd0;
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nmi_edge <= 1'b0;
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nmi_edge <= 1'b0;
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wai <= 1'b0;
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wai <= 1'b0;
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bf <= 1'b0;
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hwi <= `TRUE;
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hwi <= `TRUE;
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if (em & !nmoi) begin
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if (em & !nmoi) begin
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radr <= {spage[31:8],sp[7:2]};
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radr2LSB <= sp[1:0];
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wadr <= {spage[31:8],sp[7:2]};
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wadr2LSB <= sp[1:0];
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wdat <= {4{pc[31:24]}};
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b1;
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case(sp[1:0])
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2'd0: sel_o <= 4'b0001;
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2'd1: sel_o <= 4'b0010;
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2'd2: sel_o <= 4'b0100;
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2'd3: sel_o <= 4'b1000;
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endcase
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adr_o <= {spage[31:8],sp[7:2],2'b00};
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dat_o <= {4{pc[31:24]}};
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sp <= sp_dec;
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vect <= `BYTE_NMI_VECT;
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vect <= `BYTE_NMI_VECT;
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state <= BYTE_IRQ1;
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state <= BYTE_DECODE;
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end
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end
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else begin
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else begin
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radr <= isp_dec;
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state <= DECODE;
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wadr <= isp_dec;
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wdat <= pc;
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b1;
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sel_o <= 4'hF;
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adr_o <= {isp_dec,2'b00};
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dat_o <= pc;
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vect <= `NMI_VECT;
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vect <= `NMI_VECT;
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state <= IRQ1;
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end
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end
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end
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end
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else if (irq_i && !imiss & gie & !isExec & !isAtni) begin
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else if (irq_i && !imiss & gie & !isExec & !isAtni) begin
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if (im) begin
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wai <= 1'b0;
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wai <= 1'b0;
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if (im) begin
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if (isExec) begin
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if (isExec) begin
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ir <= exbuf;
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ir <= exbuf;
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exbuf <= 64'd0;
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exbuf <= 64'd0;
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suppress_pcinc <= 4'h0;
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suppress_pcinc <= 4'h0;
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state <= em ? BYTE_DECODE : DECODE;
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state <= em ? BYTE_DECODE : DECODE;
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| Line 92... |
Line 71... |
else
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else
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imiss <= `TRUE;
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imiss <= `TRUE;
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end
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end
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end
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end
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else begin
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else begin
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bf <= 1'b0;
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ir <= 64'd0;
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wai <= 1'b0;
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hwi <= `TRUE;
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hwi <= `TRUE;
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if (em & !nmoi) begin
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if (em & !nmoi) begin
|
radr <= {spage[31:8],sp[7:2]};
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state <= BYTE_DECODE;
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radr2LSB <= sp[1:0];
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wadr <= {spage[31:8],sp[7:2]};
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wadr2LSB <= sp[1:0];
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wdat <= {4{pc[31:24]}};
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b1;
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case(sp[1:0])
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2'd0: sel_o <= 4'b0001;
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2'd1: sel_o <= 4'b0010;
|
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2'd2: sel_o <= 4'b0100;
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2'd3: sel_o <= 4'b1000;
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endcase
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adr_o <= {spage[31:8],sp[7:2],2'b00};
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dat_o <= {4{pc[31:24]}};
|
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sp <= sp_dec;
|
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vect <= `BYTE_IRQ_VECT;
|
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state <= BYTE_IRQ1;
|
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end
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end
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else begin
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else begin
|
radr <= isp_dec;
|
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wadr <= isp_dec;
|
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wdat <= pc;
|
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
|
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we_o <= 1'b1;
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sel_o <= 4'hF;
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adr_o <= {isp_dec,2'b00};
|
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dat_o <= pc;
|
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vect <= {vbr[31:9],irq_vect,2'b00};
|
vect <= {vbr[31:9],irq_vect,2'b00};
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state <= IRQ1;
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state <= DECODE;
|
end
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end
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end
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end
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end
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end
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else if (!wai) begin
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else if (!wai) begin
|
if (isExec) begin
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if (isExec) begin
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| Line 159... |
Line 110... |
imiss <= `TRUE;
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imiss <= `TRUE;
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end
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end
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end
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end
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if (first_ifetch) begin
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if (first_ifetch) begin
|
first_ifetch <= `FALSE;
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first_ifetch <= `FALSE;
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if (hist_capture) begin
|
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history_buf[history_ndx] <= pc;
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history_ndx <= history_ndx+6'd1;
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end
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`ifdef SUPPORT_EM8
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if (em) begin
|
if (em) begin
|
case(ir[7:0])
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case(ir[7:0])
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`TAY,`TXY,`DEY,`INY: begin y[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`TAY,`TXY,`DEY,`INY: begin y[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`TAX,`TYX,`TSX,`DEX,`INX: begin x[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`TAX,`TYX,`TSX,`DEX,`INX: begin x[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`TSA,`TYA,`TXA,`INA,`DEA: begin acc[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`TSA,`TYA,`TXA,`INA,`DEA: begin acc[7:0] <= res8; nf <= resn8; zf <= resz8; end
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| Line 228... |
Line 184... |
`PLY: begin y[7:0] <= res8; zf <= resz8; nf <= resn8; end
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`PLY: begin y[7:0] <= res8; zf <= resz8; nf <= resn8; end
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`LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY: begin x[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`LDX_IMM,`LDX_ZP,`LDX_ZPY,`LDX_ABS,`LDX_ABSY: begin x[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y[7:0] <= res8; nf <= resn8; zf <= resz8; end
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`LDY_IMM,`LDY_ZP,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y[7:0] <= res8; nf <= resn8; zf <= resz8; end
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endcase
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endcase
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end
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end
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else begin
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else
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`endif
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begin
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regfile[Rt] <= res;
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regfile[Rt] <= res;
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case(Rt)
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case(Rt)
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4'h1: acc <= res;
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4'h1: acc <= res;
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4'h2: x <= res;
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4'h2: x <= res;
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4'h3: y <= res;
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4'h3: y <= res;
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default: ;
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default: ;
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endcase
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endcase
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case(ir[7:0])
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case(ir[7:0])
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`TAY,`TXY,`DEY,`INY: begin y <= res; nf <= resn32; zf <= resz32; end
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`TAX,`TYX,`TSX,`DEX,`INX: begin x <= res; nf <= resn32; zf <= resz32; end
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`TAS,`TXS: begin isp <= res; gie <= 1'b1; end
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`TAS,`TXS: begin isp <= res; gie <= 1'b1; end
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`SUB_SP8,`SUB_SP16,`SUB_SP32: isp <= res;
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`SUB_SP8,`SUB_SP16,`SUB_SP32: isp <= res;
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`TSA,`TYA,`TXA,`INA,`DEA: begin acc <= res; nf <= resn32; zf <= resz32; end
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`TRS:
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`TRS:
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begin
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begin
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case(ir[15:12])
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case(ir[15:12])
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4'h0: begin
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4'h0: begin
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$display("res=%h",res);
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$display("res=%h",res);
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`ifdef SUPPORT_ICACHE
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icacheOn <= res[0];
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icacheOn <= res[0];
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`endif
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`ifdef SUPPORT_DCACHE
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dcacheOn <= res[1];
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dcacheOn <= res[1];
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write_allocate <= res[2];
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write_allocate <= res[2];
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`endif
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end
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end
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4'h1: dp <= res;
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4'h5: lfsr <= res;
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4'h5: lfsr <= res;
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4'h6: dp8 <= res;
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4'h7: abs8 <= res;
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4'h7: abs8 <= res;
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4'h8: begin vbr <= {res[31:9],9'h000}; nmoi <= res[0]; end
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4'h8: begin vbr <= {res[31:9],9'h000}; nmoi <= res[0]; end
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4'hE: begin sp <= res[7:0]; spage[31:8] <= res[31:8]; end
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4'hE: begin sp <= res[7:0]; spage[31:8] <= res[31:8]; end
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4'hF: begin isp <= res; gie <= 1'b1; end
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4'hF: begin isp <= res; gie <= 1'b1; end
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endcase
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endcase
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| Line 273... |
Line 230... |
`AND_RR:
|
`AND_RR:
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if (Rt==4'h0) // BIT sets overflow
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if (Rt==4'h0) // BIT sets overflow
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begin nf <= b[31]; vf <= b[30]; zf <= resz32; end
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begin nf <= b[31]; vf <= b[30]; zf <= resz32; end
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else
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else
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begin nf <= resn32; zf <= resz32; end
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begin nf <= resn32; zf <= resz32; end
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`OR_RR: begin nf <= resn32; zf <= resz32; end
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default:
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`EOR_RR: begin nf <= resn32; zf <= resz32; end
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begin nf <= resn32; zf <= resz32; end
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`MUL_RR: begin nf <= resn32; zf <= resz32; end
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`MULS_RR: begin nf <= resn32; zf <= resz32; end
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`DIV_RR: begin nf <= resn32; zf <= resz32; end
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`DIVS_RR: begin nf <= resn32; zf <= resz32; end
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`MOD_RR: begin nf <= resn32; zf <= resz32; end
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`MODS_RR: begin nf <= resn32; zf <= resz32; end
|
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`ASL_RRR: begin nf <= resn32; zf <= resz32; end
|
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`LSR_RRR: begin nf <= resn32; zf <= resz32; end
|
|
endcase
|
endcase
|
`LD_RR: begin zf <= resz32; nf <= resn32; end
|
`LD_RR: begin zf <= resz32; nf <= resn32; end
|
`DEC_RR,`INC_RR: begin zf <= resz32; nf <= resn32; end
|
`DEC_RR,`INC_RR: begin zf <= resz32; nf <= resn32; end
|
`ASL_RR,`ROL_RR,`LSR_RR,`ROR_RR: begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
|
`ADD_IMM8,`ADD_IMM16,`ADD_IMM32,`ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:
|
`ADD_IMM8,`ADD_IMM16,`ADD_IMM32,`ADD_ZPX,`ADD_IX,`ADD_IY,`ADD_ABS,`ADD_ABSX,`ADD_RIND:
|
begin vf <= resv32; cf <= resc32; nf <= resn32; zf <= resz32; end
|
begin vf <= resv32; cf <= resc32; nf <= resn32; zf <= resz32; end
|
`SUB_IMM8,`SUB_IMM16,`SUB_IMM32,`SUB_ZPX,`SUB_IX,`SUB_IY,`SUB_ABS,`SUB_ABSX,`SUB_RIND:
|
`SUB_IMM8,`SUB_IMM16,`SUB_IMM32,`SUB_ZPX,`SUB_IX,`SUB_IY,`SUB_ABS,`SUB_ABSX,`SUB_RIND:
|
if (Rt==4'h0) // CMP doesn't set overflow
|
if (Rt==4'h0) // CMP doesn't set overflow
|
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
| Line 303... |
Line 251... |
begin nf <= resn32; zf <= resz32; end
|
begin nf <= resn32; zf <= resz32; end
|
`ORB_ZPX,`ORB_ABS,`ORB_ABSX,
|
`ORB_ZPX,`ORB_ABS,`ORB_ABSX,
|
`OR_IMM8,`OR_IMM16,`OR_IMM32,`OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND,
|
`OR_IMM8,`OR_IMM16,`OR_IMM32,`OR_ZPX,`OR_IX,`OR_IY,`OR_ABS,`OR_ABSX,`OR_RIND,
|
`EOR_IMM8,`EOR_IMM16,`EOR_IMM32,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:
|
`EOR_IMM8,`EOR_IMM16,`EOR_IMM32,`EOR_ZPX,`EOR_IX,`EOR_IY,`EOR_ABS,`EOR_ABSX,`EOR_RIND:
|
begin nf <= resn32; zf <= resz32; end
|
begin nf <= resn32; zf <= resz32; end
|
`ASL_ACC: begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ASL_ACC,`ROL_ACC,`LSR_ACC,`ROR_ACC:
|
`ROL_ACC: begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
|
begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
|
`LSR_ACC: begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ASL_RR,`ROL_RR,`LSR_RR,`ROR_RR,
|
`ROR_ACC: begin acc <= res; cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ASL_ZPX,`ASL_ABS,`ASL_ABSX,
|
`ASL_ZPX,`ASL_ABS,`ASL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ROL_ZPX,`ROL_ABS,`ROL_ABSX,
|
`ROL_ZPX,`ROL_ABS,`ROL_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
`LSR_ZPX,`LSR_ABS,`LSR_ABSX,
|
`LSR_ZPX,`LSR_ABS,`LSR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ROR_ZPX,`ROR_ABS,`ROR_ABSX:
|
`ROR_ZPX,`ROR_ABS,`ROR_ABSX: begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
begin cf <= resc32; nf <= resn32; zf <= resz32; end
|
`ASL_IMM8: begin nf <= resn32; zf <= resz32; end
|
`ASL_IMM8: begin nf <= resn32; zf <= resz32; end
|
`LSR_IMM8: begin nf <= resn32; zf <= resz32; end
|
`LSR_IMM8: begin nf <= resn32; zf <= resz32; end
|
`INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn32; zf <= resz32; end
|
`INC_ZPX,`INC_ABS,`INC_ABSX: begin nf <= resn32; zf <= resz32; end
|
`DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn32; zf <= resz32; end
|
`DEC_ZPX,`DEC_ABS,`DEC_ABSX: begin nf <= resn32; zf <= resz32; end
|
`PLA: begin acc <= res; zf <= resz32; nf <= resn32; end
|
`TAX,`TYX,`TSX,`DEX,`INX,
|
`PLX: begin x <= res; zf <= resz32; nf <= resn32; end
|
`LDX_IMM32,`LDX_IMM16,`LDX_IMM8,`LDX_ZPY,`LDX_ABS,`LDX_ABSY,`PLX:
|
`PLY: begin y <= res; zf <= resz32; nf <= resn32; end
|
begin x <= res; nf <= resn32; zf <= resz32; end
|
`LDX_IMM32,`LDX_IMM16,`LDX_IMM8,`LDX_ZPY,`LDX_ABS,`LDX_ABSY: begin x <= res; nf <= resn32; zf <= resz32; end
|
`TAY,`TXY,`DEY,`INY,
|
`LDY_IMM32,`LDY_ZPX,`LDY_ABS,`LDY_ABSX: begin y <= res; nf <= resn32; zf <= resz32; end
|
`LDY_IMM32,`LDY_ZPX,`LDY_ABS,`LDY_ABSX,`PLY:
|
|
begin y <= res; nf <= resn32; zf <= resz32; end
|
`CPX_IMM32,`CPX_ZPX,`CPX_ABS: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`CPX_IMM32,`CPX_ZPX,`CPX_ABS: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`CPY_IMM32,`CPY_ZPX,`CPY_ABS: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`CPY_IMM32,`CPY_ZPX,`CPY_ABS: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`CMP_IMM8: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`CMP_IMM8: begin cf <= ~resc32; nf <= resn32; zf <= resz32; end
|
`LDA_IMM32,`LDA_IMM16,`LDA_IMM8: begin acc <= res; nf <= resn32; zf <= resz32; end
|
`TSA,`TYA,`TXA,`INA,`DEA,
|
|
`LDA_IMM32,`LDA_IMM16,`LDA_IMM8,`PLA: begin acc <= res; nf <= resn32; zf <= resz32; end
|
|
`POP: begin nf <= resn32; zf <= resz32; end
|
endcase
|
endcase
|
end
|
end
|
end
|
end
|
end
|
end
|
|
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No newline at end of file
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No newline at end of file
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