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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [store.v] - Diff between revs 21 and 23

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Rev 21 Rev 23
Line 46... Line 46...
 
 
// Terminal state for stores. Update the data cache if there was a cache hit.
// Terminal state for stores. Update the data cache if there was a cache hit.
// Clear any previously set lock status
// Clear any previously set lock status
STORE2:
STORE2:
        if (ack_i) begin
        if (ack_i) begin
 
                if (isMove)
 
                        state <= MVN3;
 
                else
                state <= IFETCH;
                state <= IFETCH;
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
Line 61... Line 64...
                        wr <= 1'b1;
                        wr <= 1'b1;
                end
                end
                else if (write_allocate) begin
                else if (write_allocate) begin
                        dmiss <= `TRUE;
                        dmiss <= `TRUE;
                        state <= WAIT_DHIT;
                        state <= WAIT_DHIT;
 
                        if (isMove)
 
                                retstate <= MVN3;
 
                        else
                        retstate <= IFETCH;
                        retstate <= IFETCH;
                end
                end
        end
        end
        else if (err_i) begin
        else if (err_i) begin
                lock_o <= 1'b0;
                lock_o <= 1'b0;
                cyc_o <= 1'b0;
                cyc_o <= 1'b0;
                stb_o <= 1'b0;
                stb_o <= 1'b0;
                we_o <= 1'b0;
                we_o <= 1'b0;
                sel_o <= 4'h0;
                sel_o <= 4'h0;
                adr_o <= 34'h0;
 
                dat_o <= 32'h0;
                dat_o <= 32'h0;
                state <= BUS_ERROR;
                state <= BUS_ERROR;
        end
        end
 
 
 
 
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