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[/] [rtfbitmapcontroller/] [trunk/] [rtl/] [verilog/] [FTBitmapController.v] - Diff between revs 21 and 22

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Rev 21 Rev 22
Line 34... Line 34...
 
 
module FTBitmapController(
module FTBitmapController(
        rst_i,
        rst_i,
        s_clk_i, s_cs_i, s_cyc_i, s_stb_i, s_ack_o, s_we_i, s_adr_i, s_dat_i, s_dat_o, irq_o,
        s_clk_i, s_cs_i, s_cyc_i, s_stb_i, s_ack_o, s_we_i, s_adr_i, s_dat_i, s_dat_o, irq_o,
        m_clk_i, m_bte_o, m_cti_o, m_cyc_o, m_stb_o, m_ack_i, m_we_o, m_sel_o, m_adr_o, m_dat_i, m_dat_o,
        m_clk_i, m_bte_o, m_cti_o, m_cyc_o, m_stb_o, m_ack_i, m_we_o, m_sel_o, m_adr_o, m_dat_i, m_dat_o,
        vclk, hsync, vsync, blank, rgbo, xonoff
        vclk, hsync, vsync, blank, rgbo, rgbPlane_o, xonoff
);
);
parameter pIOAddress = 32'hFFDC5000;
parameter pIOAddress = 32'hFFDC5000;
parameter BM_BASE_ADDR1 = 32'h0020_0000;
parameter BM_BASE_ADDR1 = 32'h0020_0000;
parameter BM_BASE_ADDR2 = 32'h0028_0000;
parameter BM_BASE_ADDR2 = 32'h0028_0000;
parameter REG_CTRL = 10'd0;
parameter REG_CTRL = 10'd0;

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