| Line 5... |
Line 5... |
// Revision Control Information
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// Revision Control Information
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//
|
//
|
// $RCSfile: altera_tse_multi_mac_pcs_pma_gige.v,v $
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// $RCSfile: altera_tse_multi_mac_pcs_pma_gige.v,v $
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// $Source: /ipbu/cvs/sio/projects/TriSpeedEthernet/src/RTL/Top_level_modules/altera_tse_multi_mac_pcs_pma_gige_phyip.v,v $
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// $Source: /ipbu/cvs/sio/projects/TriSpeedEthernet/src/RTL/Top_level_modules/altera_tse_multi_mac_pcs_pma_gige_phyip.v,v $
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//
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//
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// $Revision: #2 $
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// $Revision: #5 $
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// $Date: 2011/01/31 $
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// $Date: 2012/01/30 $
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// Check in by : $Author: wyleong $
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// Check in by : $Author: hschmit $
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// Author : Arul Paniandi
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// Author : Arul Paniandi
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//
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//
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// Project : Triple Speed Ethernet - 10/100/1000 MAC
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// Project : Triple Speed Ethernet - 10/100/1000 MAC
|
//
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//
|
// Description :
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// Description :
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| Line 71... |
Line 71... |
parameter EXPORT_PWRDN = 1'b0, // Option to export the Alt2gxb powerdown signal
|
parameter EXPORT_PWRDN = 1'b0, // Option to export the Alt2gxb powerdown signal
|
parameter DEVICE_FAMILY = "ARRIAGX", // The device family the the core is targetted for.
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parameter DEVICE_FAMILY = "ARRIAGX", // The device family the the core is targetted for.
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parameter TRANSCEIVER_OPTION = 1'b0, // Option to select transceiver block for MAC PCS PMA Instantiation. Valid Values are 0 and 1: 0 - GXB (GIGE Mode) 1 - LVDS IO
|
parameter TRANSCEIVER_OPTION = 1'b0, // Option to select transceiver block for MAC PCS PMA Instantiation. Valid Values are 0 and 1: 0 - GXB (GIGE Mode) 1 - LVDS IO
|
parameter ENABLE_ALT_RECONFIG = 0, // Option to expose the altreconfig ports
|
parameter ENABLE_ALT_RECONFIG = 0, // Option to expose the altreconfig ports
|
parameter SYNCHRONIZER_DEPTH = 3, // Number of synchronizer
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parameter SYNCHRONIZER_DEPTH = 3, // Number of synchronizer
|
|
|
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//IEEE1588 code
|
|
parameter TSTAMP_FP_WIDTH = 4, // Finger print width associated to the timestamp request
|
|
parameter ENABLE_TIMESTAMPING = 0, // To enable time stamping logic
|
|
parameter ENABLE_PTP_1STEP = 0, // To enable time 1 step clock PTP
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// Internal parameters
|
// Internal parameters
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parameter STARTING_CHANNEL_NUMBER = 0,
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parameter STARTING_CHANNEL_NUMBER = 0,
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parameter ADDR_WIDTH = (MAX_CHANNELS > 16)? 13 :
|
parameter ADDR_WIDTH = (MAX_CHANNELS > 16)? 13 :
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(MAX_CHANNELS > 8)? 12 :
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(MAX_CHANNELS > 8)? 12 :
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(MAX_CHANNELS > 4)? 11 :
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(MAX_CHANNELS > 4)? 11 :
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| Line 105... |
Line 110... |
input wire ref_clk, // Rference Clock
|
input wire ref_clk, // Rference Clock
|
|
|
// SHARED CLK SIGNALS
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// SHARED CLK SIGNALS
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output wire mac_rx_clk, // Av-ST Receive Clock
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output wire mac_rx_clk, // Av-ST Receive Clock
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output wire mac_tx_clk, // Av-ST Transmit Clock
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output wire mac_tx_clk, // Av-ST Transmit Clock
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input wire pcs_phase_measure_clk, // Phase Measurement Clock
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|
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// SHARED RX STATUS
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// SHARED RX STATUS
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input wire rx_afull_clk, // Almost full clk
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input wire rx_afull_clk, // Almost full clk
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input wire [1:0] rx_afull_data, // Almost full data
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input wire [1:0] rx_afull_data, // Almost full data
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input wire rx_afull_valid, // Almost full valid
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input wire rx_afull_valid, // Almost full valid
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| Line 162... |
Line 168... |
output wire [31:0]phy_mgmt_readdata_0, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_0, // readdata from PHYIP management interface
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output wire phy_mgmt_waitrequest_0, // waitrequest from PHYIP management interface
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output wire phy_mgmt_waitrequest_0, // waitrequest from PHYIP management interface
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input wire phy_mgmt_write_0, // write to PHYIP management interface
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input wire phy_mgmt_write_0, // write to PHYIP management interface
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input wire [31:0]phy_mgmt_writedata_0,// writedata to PHYIP management interface
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input wire [31:0]phy_mgmt_writedata_0,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_0, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_0, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_0, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_0, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_0, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_0, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_0, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_0, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_0, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_0, // Time of Day
|
|
|
|
|
// CHANNEL 1
|
// CHANNEL 1
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_1, // Differential Receive Data
|
input wire rxp_1, // Differential Receive Data
|
| Line 212... |
Line 230... |
output wire [31:0]phy_mgmt_readdata_1, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_1, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_1, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_1, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_1, // write to PHYIP management interface
|
input wire phy_mgmt_write_1, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_1,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_1,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_1, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_1, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_1, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_1, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_1, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_1, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_1, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_1, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_1, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_1, // Time of Day
|
|
|
|
|
// CHANNEL 2
|
// CHANNEL 2
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_2, // Differential Receive Data
|
input wire rxp_2, // Differential Receive Data
|
| Line 262... |
Line 292... |
output wire [31:0]phy_mgmt_readdata_2, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_2, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_2, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_2, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_2, // write to PHYIP management interface
|
input wire phy_mgmt_write_2, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_2,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_2,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_2, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_2, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_2, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_2, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_2, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_2, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_2, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_2, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_2, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_2, // Time of Day
|
|
|
|
|
// CHANNEL 3
|
// CHANNEL 3
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_3, // Differential Receive Data
|
input wire rxp_3, // Differential Receive Data
|
| Line 312... |
Line 354... |
output wire [31:0]phy_mgmt_readdata_3, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_3, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_3, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_3, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_3, // write to PHYIP management interface
|
input wire phy_mgmt_write_3, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_3,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_3,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_3, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_3, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_3, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_3, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_3, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_3, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_3, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_3, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_3, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_3, // Time of Day
|
|
|
|
|
// CHANNEL 4
|
// CHANNEL 4
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_4, // Differential Receive Data
|
input wire rxp_4, // Differential Receive Data
|
| Line 362... |
Line 416... |
output wire [31:0]phy_mgmt_readdata_4, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_4, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_4, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_4, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_4, // write to PHYIP management interface
|
input wire phy_mgmt_write_4, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_4,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_4,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_4, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_4, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_4, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_4, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_4, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_4, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_4, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_4, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_4, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_4, // Time of Day
|
|
|
|
|
// CHANNEL 5
|
// CHANNEL 5
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_5, // Differential Receive Data
|
input wire rxp_5, // Differential Receive Data
|
| Line 412... |
Line 478... |
output wire [31:0]phy_mgmt_readdata_5, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_5, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_5, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_5, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_5, // write to PHYIP management interface
|
input wire phy_mgmt_write_5, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_5,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_5,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_5, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_5, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_5, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_5, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_5, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_5, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_5, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_5, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_5, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_5, // Time of Day
|
|
|
|
|
// CHANNEL 6
|
// CHANNEL 6
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_6, // Differential Receive Data
|
input wire rxp_6, // Differential Receive Data
|
| Line 462... |
Line 540... |
output wire [31:0]phy_mgmt_readdata_6, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_6, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_6, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_6, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_6, // write to PHYIP management interface
|
input wire phy_mgmt_write_6, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_6,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_6,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_6, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_6, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_6, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_6, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_6, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_6, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_6, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_6, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_6, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_6, // Time of Day
|
|
|
|
|
// CHANNEL 7
|
// CHANNEL 7
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_7, // Differential Receive Data
|
input wire rxp_7, // Differential Receive Data
|
| Line 512... |
Line 602... |
output wire [31:0]phy_mgmt_readdata_7, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_7, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_7, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_7, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_7, // write to PHYIP management interface
|
input wire phy_mgmt_write_7, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_7,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_7,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_7, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_7, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_7, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_7, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_7, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_7, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_7, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_7, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_7, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_7, // Time of Day
|
|
|
|
|
// CHANNEL 8
|
// CHANNEL 8
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_8, // Differential Receive Data
|
input wire rxp_8, // Differential Receive Data
|
| Line 562... |
Line 664... |
output wire [31:0]phy_mgmt_readdata_8, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_8, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_8, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_8, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_8, // write to PHYIP management interface
|
input wire phy_mgmt_write_8, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_8,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_8,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_8, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_8, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_8, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_8, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_8, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_8, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_8, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_8, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_8, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_8, // Time of Day
|
|
|
|
|
// CHANNEL 9
|
// CHANNEL 9
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_9, // Differential Receive Data
|
input wire rxp_9, // Differential Receive Data
|
| Line 612... |
Line 726... |
output wire [31:0]phy_mgmt_readdata_9, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_9, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_9, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_9, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_9, // write to PHYIP management interface
|
input wire phy_mgmt_write_9, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_9,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_9,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_9, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_9, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_9, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_9, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_9, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_9, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_9, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_9, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_9, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_9, // Time of Day
|
|
|
|
|
// CHANNEL 10
|
// CHANNEL 10
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_10, // Differential Receive Data
|
input wire rxp_10, // Differential Receive Data
|
| Line 662... |
Line 788... |
output wire [31:0]phy_mgmt_readdata_10, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_10, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_10, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_10, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_10, // write to PHYIP management interface
|
input wire phy_mgmt_write_10, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_10,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_10,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_10, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_10, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_10, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_10, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_10, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_10, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_10, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_10, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_10, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_10, // Time of Day
|
|
|
|
|
// CHANNEL 11
|
// CHANNEL 11
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_11, // Differential Receive Data
|
input wire rxp_11, // Differential Receive Data
|
| Line 712... |
Line 850... |
output wire [31:0]phy_mgmt_readdata_11, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_11, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_11, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_11, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_11, // write to PHYIP management interface
|
input wire phy_mgmt_write_11, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_11,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_11,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_11, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_11, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_11, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_11, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_11, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_11, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_11, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_11, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_11, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_11, // Time of Day
|
|
|
|
|
// CHANNEL 12
|
// CHANNEL 12
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_12, // Differential Receive Data
|
input wire rxp_12, // Differential Receive Data
|
| Line 762... |
Line 912... |
output wire [31:0]phy_mgmt_readdata_12, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_12, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_12, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_12, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_12, // write to PHYIP management interface
|
input wire phy_mgmt_write_12, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_12,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_12,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_12, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_12, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_12, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_12, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_12, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_12, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_12, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_12, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_12, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_12, // Time of Day
|
|
|
|
|
// CHANNEL 13
|
// CHANNEL 13
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_13, // Differential Receive Data
|
input wire rxp_13, // Differential Receive Data
|
| Line 812... |
Line 974... |
output wire [31:0]phy_mgmt_readdata_13, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_13, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_13, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_13, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_13, // write to PHYIP management interface
|
input wire phy_mgmt_write_13, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_13,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_13,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_13, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_13, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_13, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_13, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_13, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_13, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_13, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_13, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_13, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_13, // Time of Day
|
|
|
|
|
// CHANNEL 14
|
// CHANNEL 14
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_14, // Differential Receive Data
|
input wire rxp_14, // Differential Receive Data
|
| Line 862... |
Line 1036... |
output wire [31:0]phy_mgmt_readdata_14, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_14, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_14, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_14, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_14, // write to PHYIP management interface
|
input wire phy_mgmt_write_14, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_14,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_14,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_14, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_14, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_14, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_14, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_14, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_14, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_14, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_14, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_14, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_14, // Time of Day
|
|
|
|
|
// CHANNEL 15
|
// CHANNEL 15
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_15, // Differential Receive Data
|
input wire rxp_15, // Differential Receive Data
|
| Line 912... |
Line 1098... |
output wire [31:0]phy_mgmt_readdata_15, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_15, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_15, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_15, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_15, // write to PHYIP management interface
|
input wire phy_mgmt_write_15, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_15,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_15,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_15, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_15, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_15, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_15, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_15, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_15, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_15, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_15, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_15, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_15, // Time of Day
|
|
|
|
|
// CHANNEL 16
|
// CHANNEL 16
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_16, // Differential Receive Data
|
input wire rxp_16, // Differential Receive Data
|
| Line 962... |
Line 1160... |
output wire [31:0]phy_mgmt_readdata_16, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_16, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_16, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_16, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_16, // write to PHYIP management interface
|
input wire phy_mgmt_write_16, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_16,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_16,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_16, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_16, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_16, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_16, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_16, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_16, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_16, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_16, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_16, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_16, // Time of Day
|
|
|
|
|
// CHANNEL 17
|
// CHANNEL 17
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_17, // Differential Receive Data
|
input wire rxp_17, // Differential Receive Data
|
| Line 1012... |
Line 1222... |
output wire [31:0]phy_mgmt_readdata_17, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_17, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_17, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_17, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_17, // write to PHYIP management interface
|
input wire phy_mgmt_write_17, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_17,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_17,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_17, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_17, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_17, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_17, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_17, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_17, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_17, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_17, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_17, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_17, // Time of Day
|
|
|
|
|
// CHANNEL 18
|
// CHANNEL 18
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_18, // Differential Receive Data
|
input wire rxp_18, // Differential Receive Data
|
| Line 1062... |
Line 1284... |
output wire [31:0]phy_mgmt_readdata_18, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_18, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_18, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_18, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_18, // write to PHYIP management interface
|
input wire phy_mgmt_write_18, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_18,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_18,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_18, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_18, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_18, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_18, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_18, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_18, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_18, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_18, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_18, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_18, // Time of Day
|
|
|
|
|
// CHANNEL 19
|
// CHANNEL 19
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_19, // Differential Receive Data
|
input wire rxp_19, // Differential Receive Data
|
| Line 1112... |
Line 1346... |
output wire [31:0]phy_mgmt_readdata_19, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_19, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_19, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_19, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_19, // write to PHYIP management interface
|
input wire phy_mgmt_write_19, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_19,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_19,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_19, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_19, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_19, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_19, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_19, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_19, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_19, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_19, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_19, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_19, // Time of Day
|
|
|
|
|
// CHANNEL 20
|
// CHANNEL 20
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_20, // Differential Receive Data
|
input wire rxp_20, // Differential Receive Data
|
| Line 1162... |
Line 1408... |
output wire [31:0]phy_mgmt_readdata_20, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_20, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_20, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_20, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_20, // write to PHYIP management interface
|
input wire phy_mgmt_write_20, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_20,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_20,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_20, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_20, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_20, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_20, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_20, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_20, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_20, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_20, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_20, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_20, // Time of Day
|
|
|
|
|
// CHANNEL 21
|
// CHANNEL 21
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_21, // Differential Receive Data
|
input wire rxp_21, // Differential Receive Data
|
| Line 1212... |
Line 1470... |
output wire [31:0]phy_mgmt_readdata_21, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_21, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_21, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_21, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_21, // write to PHYIP management interface
|
input wire phy_mgmt_write_21, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_21,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_21,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_21, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_21, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_21, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_21, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_21, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_21, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_21, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_21, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_21, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_21, // Time of Day
|
|
|
|
|
// CHANNEL 22
|
// CHANNEL 22
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_22, // Differential Receive Data
|
input wire rxp_22, // Differential Receive Data
|
| Line 1262... |
Line 1532... |
output wire [31:0]phy_mgmt_readdata_22, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_22, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_22, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_22, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_22, // write to PHYIP management interface
|
input wire phy_mgmt_write_22, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_22,// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_22,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_22, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_22, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_22, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_22, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_22, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_22, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_22, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_22, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_22, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_22, // Time of Day
|
|
|
|
|
// CHANNEL 23
|
// CHANNEL 23
|
|
|
// PCS SIGNALS TO PHY
|
// PCS SIGNALS TO PHY
|
input wire rxp_23, // Differential Receive Data
|
input wire rxp_23, // Differential Receive Data
|
| Line 1310... |
Line 1592... |
input wire [8:0]phy_mgmt_address_23, // address to PHYIP management interface
|
input wire [8:0]phy_mgmt_address_23, // address to PHYIP management interface
|
input wire phy_mgmt_read_23, // read to PHYIP management interface
|
input wire phy_mgmt_read_23, // read to PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_23, // readdata from PHYIP management interface
|
output wire [31:0]phy_mgmt_readdata_23, // readdata from PHYIP management interface
|
output wire phy_mgmt_waitrequest_23, // waitrequest from PHYIP management interface
|
output wire phy_mgmt_waitrequest_23, // waitrequest from PHYIP management interface
|
input wire phy_mgmt_write_23, // write to PHYIP management interface
|
input wire phy_mgmt_write_23, // write to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_23);// writedata to PHYIP management interface
|
input wire [31:0]phy_mgmt_writedata_23,// writedata to PHYIP management interface
|
|
|
|
//IEEE1588's code
|
|
input wire tx_egress_timestamp_request_valid_23, // Timestamp request valid from user
|
|
input wire [(TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_request_data_23, // Fingerprint associated to the timestamp request
|
|
output wire tx_egress_timestamp_valid_23, // Timestamp + fingerprint from TSU
|
|
output wire [(96 + TSTAMP_FP_WIDTH)-1:0] tx_egress_timestamp_data_23, // Timestamp + fingerprint from TSU
|
|
input wire [96-1:0] tx_time_of_day_data_23, // Time of Day
|
|
input wire tx_ingress_timestamp_valid_23, // Timestamp to TSU
|
|
input wire [(96)-1:0] tx_ingress_timestamp_data_23, // Timestamp to TSU
|
|
output wire rx_ingress_timestamp_valid_23, // RX timestamp valid
|
|
output wire [(96)-1:0] rx_ingress_timestamp_data_23, // RX timestamp data
|
|
input wire [96-1:0] rx_time_of_day_data_23); // Time of Day
|
|
|
|
|
wire MAC_PCS_reset;
|
wire MAC_PCS_reset;
|
wire [23:0] pcs_pwrdn_out_sig;
|
wire [23:0] pcs_pwrdn_out_sig;
|
wire [23:0] gxb_pwrdn_in_sig;
|
wire [23:0] gxb_pwrdn_in_sig;
|
| Line 1626... |
Line 1920... |
assign led_link_21 = link_status[21];
|
assign led_link_21 = link_status[21];
|
assign led_char_err_22 = led_char_err_gx[22];
|
assign led_char_err_22 = led_char_err_gx[22];
|
assign led_link_22 = link_status[22];
|
assign led_link_22 = link_status[22];
|
assign led_char_err_23 = led_char_err_gx[23];
|
assign led_char_err_23 = led_char_err_gx[23];
|
assign led_link_23 = link_status[23];
|
assign led_link_23 = link_status[23];
|
|
wire pcs_phase_measure_clk_w;
|
|
|
|
generate
|
|
if (ENABLE_TIMESTAMPING == 0)
|
|
begin
|
|
assign pcs_phase_measure_clk_w = 1'b0;
|
|
end
|
|
else
|
|
begin
|
|
assign pcs_phase_measure_clk_w = pcs_phase_measure_clk;
|
|
end
|
|
endgenerate
|
|
|
|
|
// Instantiation of the MAC_PCS core that connects to a PMA
|
// Instantiation of the MAC_PCS core that connects to a PMA
|
// --------------------------------------------------------
|
// --------------------------------------------------------
|
|
|
| Line 1652... |
Line 1958... |
.mac_tx_clk(mac_tx_clk), //OUTPUT : Av-ST Tx Clock
|
.mac_tx_clk(mac_tx_clk), //OUTPUT : Av-ST Tx Clock
|
.rx_afull_clk(rx_afull_clk), //INPUT : AFull Status Clock
|
.rx_afull_clk(rx_afull_clk), //INPUT : AFull Status Clock
|
.rx_afull_data(rx_afull_data), //INPUT : AFull Status Data
|
.rx_afull_data(rx_afull_data), //INPUT : AFull Status Data
|
.rx_afull_valid(rx_afull_valid), //INPUT : AFull Status Valid
|
.rx_afull_valid(rx_afull_valid), //INPUT : AFull Status Valid
|
.rx_afull_channel(rx_afull_channel), //INPUT : AFull Status Channel
|
.rx_afull_channel(rx_afull_channel), //INPUT : AFull Status Channel
|
|
.pcs_phase_measure_clk(pcs_phase_measure_clk_w),
|
|
|
// Channel 0
|
// Channel 0
|
|
|
|
|
.rx_carrierdetected_0(pcs_rx_carrierdetected[0]),
|
.rx_carrierdetected_0(pcs_rx_carrierdetected[0]),
|
| Line 1696... |
Line 2003... |
.xoff_gen_0(xoff_gen_0), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_0(xoff_gen_0), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_0(xon_gen_0), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_0(xon_gen_0), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_0(magic_sleep_n_0), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_0(magic_sleep_n_0), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_0(magic_wakeup_0), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_0(magic_wakeup_0), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_0(tx_egress_timestamp_request_valid_0), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_0(tx_egress_timestamp_request_data_0), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_0(tx_egress_timestamp_valid_0), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_0(tx_egress_timestamp_data_0), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_0(tx_time_of_day_data_0), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_0(tx_ingress_timestamp_valid_0), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_0(tx_ingress_timestamp_data_0), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_0(rx_ingress_timestamp_valid_0), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_0(rx_ingress_timestamp_data_0), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_0(rx_time_of_day_data_0), //INPUT: Time of Day
|
|
|
// Channel 1
|
// Channel 1
|
|
|
|
|
.rx_carrierdetected_1(pcs_rx_carrierdetected[1]),
|
.rx_carrierdetected_1(pcs_rx_carrierdetected[1]),
|
.rx_rmfifodatadeleted_1(pcs_rx_rmfifodatadeleted[1]),
|
.rx_rmfifodatadeleted_1(pcs_rx_rmfifodatadeleted[1]),
|
| Line 1739... |
Line 2058... |
.xoff_gen_1(xoff_gen_1), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_1(xoff_gen_1), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_1(xon_gen_1), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_1(xon_gen_1), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_1(magic_sleep_n_1), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_1(magic_sleep_n_1), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_1(magic_wakeup_1), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_1(magic_wakeup_1), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_1(tx_egress_timestamp_request_valid_1), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_1(tx_egress_timestamp_request_data_1), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_1(tx_egress_timestamp_valid_1), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_1(tx_egress_timestamp_data_1), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_1(tx_time_of_day_data_1), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_1(tx_ingress_timestamp_valid_1), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_1(tx_ingress_timestamp_data_1), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_1(rx_ingress_timestamp_valid_1), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_1(rx_ingress_timestamp_data_1), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_1(rx_time_of_day_data_1), //INPUT: Time of Day
|
|
|
// Channel 2
|
// Channel 2
|
|
|
|
|
.rx_carrierdetected_2(pcs_rx_carrierdetected[2]),
|
.rx_carrierdetected_2(pcs_rx_carrierdetected[2]),
|
.rx_rmfifodatadeleted_2(pcs_rx_rmfifodatadeleted[2]),
|
.rx_rmfifodatadeleted_2(pcs_rx_rmfifodatadeleted[2]),
|
| Line 1782... |
Line 2113... |
.xoff_gen_2(xoff_gen_2), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_2(xoff_gen_2), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_2(xon_gen_2), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_2(xon_gen_2), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_2(magic_sleep_n_2), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_2(magic_sleep_n_2), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_2(magic_wakeup_2), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_2(magic_wakeup_2), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_2(tx_egress_timestamp_request_valid_2), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_2(tx_egress_timestamp_request_data_2), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_2(tx_egress_timestamp_valid_2), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_2(tx_egress_timestamp_data_2), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_2(tx_time_of_day_data_2), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_2(tx_ingress_timestamp_valid_2), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_2(tx_ingress_timestamp_data_2), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_2(rx_ingress_timestamp_valid_2), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_2(rx_ingress_timestamp_data_2), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_2(rx_time_of_day_data_2), //INPUT: Time of Day
|
|
|
// Channel 3
|
// Channel 3
|
|
|
|
|
.rx_carrierdetected_3(pcs_rx_carrierdetected[3]),
|
.rx_carrierdetected_3(pcs_rx_carrierdetected[3]),
|
.rx_rmfifodatadeleted_3(pcs_rx_rmfifodatadeleted[3]),
|
.rx_rmfifodatadeleted_3(pcs_rx_rmfifodatadeleted[3]),
|
| Line 1825... |
Line 2168... |
.xoff_gen_3(xoff_gen_3), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_3(xoff_gen_3), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_3(xon_gen_3), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_3(xon_gen_3), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_3(magic_sleep_n_3), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_3(magic_sleep_n_3), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_3(magic_wakeup_3), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_3(magic_wakeup_3), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_3(tx_egress_timestamp_request_valid_3), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_3(tx_egress_timestamp_request_data_3), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_3(tx_egress_timestamp_valid_3), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_3(tx_egress_timestamp_data_3), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_3(tx_time_of_day_data_3), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_3(tx_ingress_timestamp_valid_3), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_3(tx_ingress_timestamp_data_3), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_3(rx_ingress_timestamp_valid_3), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_3(rx_ingress_timestamp_data_3), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_3(rx_time_of_day_data_3), //INPUT: Time of Day
|
|
|
// Channel 4
|
// Channel 4
|
|
|
|
|
.rx_carrierdetected_4(pcs_rx_carrierdetected[4]),
|
.rx_carrierdetected_4(pcs_rx_carrierdetected[4]),
|
.rx_rmfifodatadeleted_4(pcs_rx_rmfifodatadeleted[4]),
|
.rx_rmfifodatadeleted_4(pcs_rx_rmfifodatadeleted[4]),
|
| Line 1868... |
Line 2223... |
.xoff_gen_4(xoff_gen_4), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_4(xoff_gen_4), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_4(xon_gen_4), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_4(xon_gen_4), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_4(magic_sleep_n_4), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_4(magic_sleep_n_4), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_4(magic_wakeup_4), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_4(magic_wakeup_4), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_4(tx_egress_timestamp_request_valid_4), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_4(tx_egress_timestamp_request_data_4), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_4(tx_egress_timestamp_valid_4), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_4(tx_egress_timestamp_data_4), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_4(tx_time_of_day_data_4), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_4(tx_ingress_timestamp_valid_4), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_4(tx_ingress_timestamp_data_4), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_4(rx_ingress_timestamp_valid_4), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_4(rx_ingress_timestamp_data_4), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_4(rx_time_of_day_data_4), //INPUT: Time of Day
|
|
|
// Channel 5
|
// Channel 5
|
|
|
|
|
.rx_carrierdetected_5(pcs_rx_carrierdetected[5]),
|
.rx_carrierdetected_5(pcs_rx_carrierdetected[5]),
|
.rx_rmfifodatadeleted_5(pcs_rx_rmfifodatadeleted[5]),
|
.rx_rmfifodatadeleted_5(pcs_rx_rmfifodatadeleted[5]),
|
| Line 1911... |
Line 2278... |
.xoff_gen_5(xoff_gen_5), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_5(xoff_gen_5), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_5(xon_gen_5), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_5(xon_gen_5), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_5(magic_sleep_n_5), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_5(magic_sleep_n_5), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_5(magic_wakeup_5), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_5(magic_wakeup_5), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_5(tx_egress_timestamp_request_valid_5), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_5(tx_egress_timestamp_request_data_5), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_5(tx_egress_timestamp_valid_5), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_5(tx_egress_timestamp_data_5), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_5(tx_time_of_day_data_5), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_5(tx_ingress_timestamp_valid_5), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_5(tx_ingress_timestamp_data_5), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_5(rx_ingress_timestamp_valid_5), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_5(rx_ingress_timestamp_data_5), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_5(rx_time_of_day_data_5), //INPUT: Time of Day
|
|
|
// Channel 6
|
// Channel 6
|
|
|
|
|
.rx_carrierdetected_6(pcs_rx_carrierdetected[6]),
|
.rx_carrierdetected_6(pcs_rx_carrierdetected[6]),
|
.rx_rmfifodatadeleted_6(pcs_rx_rmfifodatadeleted[6]),
|
.rx_rmfifodatadeleted_6(pcs_rx_rmfifodatadeleted[6]),
|
| Line 1954... |
Line 2333... |
.xoff_gen_6(xoff_gen_6), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_6(xoff_gen_6), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_6(xon_gen_6), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_6(xon_gen_6), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_6(magic_sleep_n_6), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_6(magic_sleep_n_6), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_6(magic_wakeup_6), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_6(magic_wakeup_6), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_6(tx_egress_timestamp_request_valid_6), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_6(tx_egress_timestamp_request_data_6), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_6(tx_egress_timestamp_valid_6), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_6(tx_egress_timestamp_data_6), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_6(tx_time_of_day_data_6), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_6(tx_ingress_timestamp_valid_6), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_6(tx_ingress_timestamp_data_6), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_6(rx_ingress_timestamp_valid_6), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_6(rx_ingress_timestamp_data_6), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_6(rx_time_of_day_data_6), //INPUT: Time of Day
|
|
|
// Channel 7
|
// Channel 7
|
|
|
|
|
.rx_carrierdetected_7(pcs_rx_carrierdetected[7]),
|
.rx_carrierdetected_7(pcs_rx_carrierdetected[7]),
|
.rx_rmfifodatadeleted_7(pcs_rx_rmfifodatadeleted[7]),
|
.rx_rmfifodatadeleted_7(pcs_rx_rmfifodatadeleted[7]),
|
| Line 1997... |
Line 2388... |
.xoff_gen_7(xoff_gen_7), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_7(xoff_gen_7), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_7(xon_gen_7), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_7(xon_gen_7), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_7(magic_sleep_n_7), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_7(magic_sleep_n_7), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_7(magic_wakeup_7), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_7(magic_wakeup_7), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_7(tx_egress_timestamp_request_valid_7), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_7(tx_egress_timestamp_request_data_7), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_7(tx_egress_timestamp_valid_7), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_7(tx_egress_timestamp_data_7), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_7(tx_time_of_day_data_7), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_7(tx_ingress_timestamp_valid_7), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_7(tx_ingress_timestamp_data_7), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_7(rx_ingress_timestamp_valid_7), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_7(rx_ingress_timestamp_data_7), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_7(rx_time_of_day_data_7), //INPUT: Time of Day
|
|
|
// Channel 8
|
// Channel 8
|
|
|
|
|
.rx_carrierdetected_8(pcs_rx_carrierdetected[8]),
|
.rx_carrierdetected_8(pcs_rx_carrierdetected[8]),
|
.rx_rmfifodatadeleted_8(pcs_rx_rmfifodatadeleted[8]),
|
.rx_rmfifodatadeleted_8(pcs_rx_rmfifodatadeleted[8]),
|
| Line 2040... |
Line 2443... |
.xoff_gen_8(xoff_gen_8), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_8(xoff_gen_8), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_8(xon_gen_8), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_8(xon_gen_8), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_8(magic_sleep_n_8), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_8(magic_sleep_n_8), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_8(magic_wakeup_8), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_8(magic_wakeup_8), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_8(tx_egress_timestamp_request_valid_8), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_8(tx_egress_timestamp_request_data_8), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_8(tx_egress_timestamp_valid_8), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_8(tx_egress_timestamp_data_8), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_8(tx_time_of_day_data_8), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_8(tx_ingress_timestamp_valid_8), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_8(tx_ingress_timestamp_data_8), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_8(rx_ingress_timestamp_valid_8), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_8(rx_ingress_timestamp_data_8), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_8(rx_time_of_day_data_8), //INPUT: Time of Day
|
|
|
// Channel 9
|
// Channel 9
|
|
|
|
|
.rx_carrierdetected_9(pcs_rx_carrierdetected[9]),
|
.rx_carrierdetected_9(pcs_rx_carrierdetected[9]),
|
.rx_rmfifodatadeleted_9(pcs_rx_rmfifodatadeleted[9]),
|
.rx_rmfifodatadeleted_9(pcs_rx_rmfifodatadeleted[9]),
|
| Line 2083... |
Line 2498... |
.xoff_gen_9(xoff_gen_9), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_9(xoff_gen_9), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_9(xon_gen_9), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_9(xon_gen_9), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_9(magic_sleep_n_9), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_9(magic_sleep_n_9), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_9(magic_wakeup_9), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_9(magic_wakeup_9), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_9(tx_egress_timestamp_request_valid_9), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_9(tx_egress_timestamp_request_data_9), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_9(tx_egress_timestamp_valid_9), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_9(tx_egress_timestamp_data_9), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_9(tx_time_of_day_data_9), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_9(tx_ingress_timestamp_valid_9), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_9(tx_ingress_timestamp_data_9), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_9(rx_ingress_timestamp_valid_9), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_9(rx_ingress_timestamp_data_9), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_9(rx_time_of_day_data_9), //INPUT: Time of Day
|
|
|
// Channel 10
|
// Channel 10
|
|
|
|
|
.rx_carrierdetected_10(pcs_rx_carrierdetected[10]),
|
.rx_carrierdetected_10(pcs_rx_carrierdetected[10]),
|
.rx_rmfifodatadeleted_10(pcs_rx_rmfifodatadeleted[10]),
|
.rx_rmfifodatadeleted_10(pcs_rx_rmfifodatadeleted[10]),
|
| Line 2126... |
Line 2553... |
.xoff_gen_10(xoff_gen_10), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_10(xoff_gen_10), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_10(xon_gen_10), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_10(xon_gen_10), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_10(magic_sleep_n_10), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_10(magic_sleep_n_10), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_10(magic_wakeup_10), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_10(magic_wakeup_10), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_10(tx_egress_timestamp_request_valid_10), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_10(tx_egress_timestamp_request_data_10), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_10(tx_egress_timestamp_valid_10), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_10(tx_egress_timestamp_data_10), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_10(tx_time_of_day_data_10), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_10(tx_ingress_timestamp_valid_10), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_10(tx_ingress_timestamp_data_10), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_10(rx_ingress_timestamp_valid_10), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_10(rx_ingress_timestamp_data_10), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_10(rx_time_of_day_data_10), //INPUT: Time of Day
|
|
|
// Channel 11
|
// Channel 11
|
|
|
|
|
.rx_carrierdetected_11(pcs_rx_carrierdetected[11]),
|
.rx_carrierdetected_11(pcs_rx_carrierdetected[11]),
|
.rx_rmfifodatadeleted_11(pcs_rx_rmfifodatadeleted[11]),
|
.rx_rmfifodatadeleted_11(pcs_rx_rmfifodatadeleted[11]),
|
| Line 2169... |
Line 2608... |
.xoff_gen_11(xoff_gen_11), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_11(xoff_gen_11), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_11(xon_gen_11), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_11(xon_gen_11), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_11(magic_sleep_n_11), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_11(magic_sleep_n_11), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_11(magic_wakeup_11), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_11(magic_wakeup_11), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_11(tx_egress_timestamp_request_valid_11), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_11(tx_egress_timestamp_request_data_11), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_11(tx_egress_timestamp_valid_11), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_11(tx_egress_timestamp_data_11), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_11(tx_time_of_day_data_11), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_11(tx_ingress_timestamp_valid_11), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_11(tx_ingress_timestamp_data_11), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_11(rx_ingress_timestamp_valid_11), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_11(rx_ingress_timestamp_data_11), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_11(rx_time_of_day_data_11), //INPUT: Time of Day
|
|
|
// Channel 12
|
// Channel 12
|
|
|
|
|
.rx_carrierdetected_12(pcs_rx_carrierdetected[12]),
|
.rx_carrierdetected_12(pcs_rx_carrierdetected[12]),
|
.rx_rmfifodatadeleted_12(pcs_rx_rmfifodatadeleted[12]),
|
.rx_rmfifodatadeleted_12(pcs_rx_rmfifodatadeleted[12]),
|
| Line 2212... |
Line 2663... |
.xoff_gen_12(xoff_gen_12), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_12(xoff_gen_12), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_12(xon_gen_12), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_12(xon_gen_12), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_12(magic_sleep_n_12), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_12(magic_sleep_n_12), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_12(magic_wakeup_12), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_12(magic_wakeup_12), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_12(tx_egress_timestamp_request_valid_12), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_12(tx_egress_timestamp_request_data_12), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_12(tx_egress_timestamp_valid_12), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_12(tx_egress_timestamp_data_12), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_12(tx_time_of_day_data_12), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_12(tx_ingress_timestamp_valid_12), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_12(tx_ingress_timestamp_data_12), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_12(rx_ingress_timestamp_valid_12), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_12(rx_ingress_timestamp_data_12), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_12(rx_time_of_day_data_12), //INPUT: Time of Day
|
|
|
// Channel 13
|
// Channel 13
|
|
|
|
|
.rx_carrierdetected_13(pcs_rx_carrierdetected[13]),
|
.rx_carrierdetected_13(pcs_rx_carrierdetected[13]),
|
.rx_rmfifodatadeleted_13(pcs_rx_rmfifodatadeleted[13]),
|
.rx_rmfifodatadeleted_13(pcs_rx_rmfifodatadeleted[13]),
|
| Line 2255... |
Line 2718... |
.xoff_gen_13(xoff_gen_13), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_13(xoff_gen_13), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_13(xon_gen_13), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_13(xon_gen_13), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_13(magic_sleep_n_13), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_13(magic_sleep_n_13), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_13(magic_wakeup_13), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_13(magic_wakeup_13), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_13(tx_egress_timestamp_request_valid_13), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_13(tx_egress_timestamp_request_data_13), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_13(tx_egress_timestamp_valid_13), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_13(tx_egress_timestamp_data_13), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_13(tx_time_of_day_data_13), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_13(tx_ingress_timestamp_valid_13), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_13(tx_ingress_timestamp_data_13), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_13(rx_ingress_timestamp_valid_13), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_13(rx_ingress_timestamp_data_13), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_13(rx_time_of_day_data_13), //INPUT: Time of Day
|
|
|
// Channel 14
|
// Channel 14
|
|
|
|
|
.rx_carrierdetected_14(pcs_rx_carrierdetected[14]),
|
.rx_carrierdetected_14(pcs_rx_carrierdetected[14]),
|
.rx_rmfifodatadeleted_14(pcs_rx_rmfifodatadeleted[14]),
|
.rx_rmfifodatadeleted_14(pcs_rx_rmfifodatadeleted[14]),
|
| Line 2298... |
Line 2773... |
.xoff_gen_14(xoff_gen_14), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_14(xoff_gen_14), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_14(xon_gen_14), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_14(xon_gen_14), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_14(magic_sleep_n_14), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_14(magic_sleep_n_14), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_14(magic_wakeup_14), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_14(magic_wakeup_14), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_14(tx_egress_timestamp_request_valid_14), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_14(tx_egress_timestamp_request_data_14), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_14(tx_egress_timestamp_valid_14), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_14(tx_egress_timestamp_data_14), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_14(tx_time_of_day_data_14), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_14(tx_ingress_timestamp_valid_14), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_14(tx_ingress_timestamp_data_14), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_14(rx_ingress_timestamp_valid_14), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_14(rx_ingress_timestamp_data_14), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_14(rx_time_of_day_data_14), //INPUT: Time of Day
|
|
|
// Channel 15
|
// Channel 15
|
|
|
|
|
.rx_carrierdetected_15(pcs_rx_carrierdetected[15]),
|
.rx_carrierdetected_15(pcs_rx_carrierdetected[15]),
|
.rx_rmfifodatadeleted_15(pcs_rx_rmfifodatadeleted[15]),
|
.rx_rmfifodatadeleted_15(pcs_rx_rmfifodatadeleted[15]),
|
| Line 2341... |
Line 2828... |
.xoff_gen_15(xoff_gen_15), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_15(xoff_gen_15), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_15(xon_gen_15), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_15(xon_gen_15), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_15(magic_sleep_n_15), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_15(magic_sleep_n_15), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_15(magic_wakeup_15), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_15(magic_wakeup_15), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_15(tx_egress_timestamp_request_valid_15), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_15(tx_egress_timestamp_request_data_15), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_15(tx_egress_timestamp_valid_15), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_15(tx_egress_timestamp_data_15), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_15(tx_time_of_day_data_15), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_15(tx_ingress_timestamp_valid_15), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_15(tx_ingress_timestamp_data_15), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_15(rx_ingress_timestamp_valid_15), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_15(rx_ingress_timestamp_data_15), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_15(rx_time_of_day_data_15), //INPUT: Time of Day
|
|
|
// Channel 16
|
// Channel 16
|
|
|
|
|
.rx_carrierdetected_16(pcs_rx_carrierdetected[16]),
|
.rx_carrierdetected_16(pcs_rx_carrierdetected[16]),
|
.rx_rmfifodatadeleted_16(pcs_rx_rmfifodatadeleted[16]),
|
.rx_rmfifodatadeleted_16(pcs_rx_rmfifodatadeleted[16]),
|
| Line 2384... |
Line 2883... |
.xoff_gen_16(xoff_gen_16), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_16(xoff_gen_16), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_16(xon_gen_16), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_16(xon_gen_16), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_16(magic_sleep_n_16), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_16(magic_sleep_n_16), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_16(magic_wakeup_16), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_16(magic_wakeup_16), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_16(tx_egress_timestamp_request_valid_16), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_16(tx_egress_timestamp_request_data_16), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_16(tx_egress_timestamp_valid_16), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_16(tx_egress_timestamp_data_16), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_16(tx_time_of_day_data_16), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_16(tx_ingress_timestamp_valid_16), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_16(tx_ingress_timestamp_data_16), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_16(rx_ingress_timestamp_valid_16), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_16(rx_ingress_timestamp_data_16), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_16(rx_time_of_day_data_16), //INPUT: Time of Day
|
|
|
// Channel 17
|
// Channel 17
|
|
|
|
|
.rx_carrierdetected_17(pcs_rx_carrierdetected[17]),
|
.rx_carrierdetected_17(pcs_rx_carrierdetected[17]),
|
.rx_rmfifodatadeleted_17(pcs_rx_rmfifodatadeleted[17]),
|
.rx_rmfifodatadeleted_17(pcs_rx_rmfifodatadeleted[17]),
|
| Line 2427... |
Line 2938... |
.xoff_gen_17(xoff_gen_17), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_17(xoff_gen_17), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_17(xon_gen_17), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_17(xon_gen_17), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_17(magic_sleep_n_17), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_17(magic_sleep_n_17), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_17(magic_wakeup_17), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_17(magic_wakeup_17), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_17(tx_egress_timestamp_request_valid_17), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_17(tx_egress_timestamp_request_data_17), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_17(tx_egress_timestamp_valid_17), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_17(tx_egress_timestamp_data_17), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_17(tx_time_of_day_data_17), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_17(tx_ingress_timestamp_valid_17), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_17(tx_ingress_timestamp_data_17), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_17(rx_ingress_timestamp_valid_17), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_17(rx_ingress_timestamp_data_17), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_17(rx_time_of_day_data_17), //INPUT: Time of Day
|
|
|
// Channel 18
|
// Channel 18
|
|
|
|
|
.rx_carrierdetected_18(pcs_rx_carrierdetected[18]),
|
.rx_carrierdetected_18(pcs_rx_carrierdetected[18]),
|
.rx_rmfifodatadeleted_18(pcs_rx_rmfifodatadeleted[18]),
|
.rx_rmfifodatadeleted_18(pcs_rx_rmfifodatadeleted[18]),
|
| Line 2470... |
Line 2993... |
.xoff_gen_18(xoff_gen_18), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_18(xoff_gen_18), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_18(xon_gen_18), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_18(xon_gen_18), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_18(magic_sleep_n_18), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_18(magic_sleep_n_18), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_18(magic_wakeup_18), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_18(magic_wakeup_18), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_18(tx_egress_timestamp_request_valid_18), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_18(tx_egress_timestamp_request_data_18), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_18(tx_egress_timestamp_valid_18), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_18(tx_egress_timestamp_data_18), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_18(tx_time_of_day_data_18), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_18(tx_ingress_timestamp_valid_18), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_18(tx_ingress_timestamp_data_18), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_18(rx_ingress_timestamp_valid_18), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_18(rx_ingress_timestamp_data_18), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_18(rx_time_of_day_data_18), //INPUT: Time of Day
|
|
|
// Channel 19
|
// Channel 19
|
|
|
|
|
.rx_carrierdetected_19(pcs_rx_carrierdetected[19]),
|
.rx_carrierdetected_19(pcs_rx_carrierdetected[19]),
|
.rx_rmfifodatadeleted_19(pcs_rx_rmfifodatadeleted[19]),
|
.rx_rmfifodatadeleted_19(pcs_rx_rmfifodatadeleted[19]),
|
| Line 2513... |
Line 3048... |
.xoff_gen_19(xoff_gen_19), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_19(xoff_gen_19), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_19(xon_gen_19), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_19(xon_gen_19), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_19(magic_sleep_n_19), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_19(magic_sleep_n_19), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_19(magic_wakeup_19), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_19(magic_wakeup_19), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_19(tx_egress_timestamp_request_valid_19), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_19(tx_egress_timestamp_request_data_19), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_19(tx_egress_timestamp_valid_19), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_19(tx_egress_timestamp_data_19), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_19(tx_time_of_day_data_19), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_19(tx_ingress_timestamp_valid_19), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_19(tx_ingress_timestamp_data_19), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_19(rx_ingress_timestamp_valid_19), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_19(rx_ingress_timestamp_data_19), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_19(rx_time_of_day_data_19), //INPUT: Time of Day
|
|
|
// Channel 20
|
// Channel 20
|
|
|
|
|
.rx_carrierdetected_20(pcs_rx_carrierdetected[20]),
|
.rx_carrierdetected_20(pcs_rx_carrierdetected[20]),
|
.rx_rmfifodatadeleted_20(pcs_rx_rmfifodatadeleted[20]),
|
.rx_rmfifodatadeleted_20(pcs_rx_rmfifodatadeleted[20]),
|
| Line 2556... |
Line 3103... |
.xoff_gen_20(xoff_gen_20), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_20(xoff_gen_20), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_20(xon_gen_20), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_20(xon_gen_20), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_20(magic_sleep_n_20), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_20(magic_sleep_n_20), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_20(magic_wakeup_20), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_20(magic_wakeup_20), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_20(tx_egress_timestamp_request_valid_20), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_20(tx_egress_timestamp_request_data_20), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_20(tx_egress_timestamp_valid_20), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_20(tx_egress_timestamp_data_20), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_20(tx_time_of_day_data_20), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_20(tx_ingress_timestamp_valid_20), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_20(tx_ingress_timestamp_data_20), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_20(rx_ingress_timestamp_valid_20), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_20(rx_ingress_timestamp_data_20), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_20(rx_time_of_day_data_20), //INPUT: Time of Day
|
|
|
// Channel 21
|
// Channel 21
|
|
|
|
|
.rx_carrierdetected_21(pcs_rx_carrierdetected[21]),
|
.rx_carrierdetected_21(pcs_rx_carrierdetected[21]),
|
.rx_rmfifodatadeleted_21(pcs_rx_rmfifodatadeleted[21]),
|
.rx_rmfifodatadeleted_21(pcs_rx_rmfifodatadeleted[21]),
|
| Line 2599... |
Line 3158... |
.xoff_gen_21(xoff_gen_21), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_21(xoff_gen_21), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_21(xon_gen_21), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_21(xon_gen_21), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_21(magic_sleep_n_21), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_21(magic_sleep_n_21), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_21(magic_wakeup_21), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_21(magic_wakeup_21), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_21(tx_egress_timestamp_request_valid_21), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_21(tx_egress_timestamp_request_data_21), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_21(tx_egress_timestamp_valid_21), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_21(tx_egress_timestamp_data_21), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_21(tx_time_of_day_data_21), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_21(tx_ingress_timestamp_valid_21), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_21(tx_ingress_timestamp_data_21), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_21(rx_ingress_timestamp_valid_21), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_21(rx_ingress_timestamp_data_21), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_21(rx_time_of_day_data_21), //INPUT: Time of Day
|
|
|
// Channel 22
|
// Channel 22
|
|
|
|
|
.rx_carrierdetected_22(pcs_rx_carrierdetected[22]),
|
.rx_carrierdetected_22(pcs_rx_carrierdetected[22]),
|
.rx_rmfifodatadeleted_22(pcs_rx_rmfifodatadeleted[22]),
|
.rx_rmfifodatadeleted_22(pcs_rx_rmfifodatadeleted[22]),
|
| Line 2642... |
Line 3213... |
.xoff_gen_22(xoff_gen_22), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_22(xoff_gen_22), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_22(xon_gen_22), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_22(xon_gen_22), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_22(magic_sleep_n_22), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_22(magic_sleep_n_22), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_22(magic_wakeup_22), //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_22(magic_wakeup_22), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_22(tx_egress_timestamp_request_valid_22), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_22(tx_egress_timestamp_request_data_22), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_22(tx_egress_timestamp_valid_22), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_22(tx_egress_timestamp_data_22), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_22(tx_time_of_day_data_22), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_22(tx_ingress_timestamp_valid_22), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_22(tx_ingress_timestamp_data_22), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_22(rx_ingress_timestamp_valid_22), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_22(rx_ingress_timestamp_data_22), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_22(rx_time_of_day_data_22), //INPUT: Time of Day
|
|
|
// Channel 23
|
// Channel 23
|
|
|
|
|
.rx_carrierdetected_23(pcs_rx_carrierdetected[23]),
|
.rx_carrierdetected_23(pcs_rx_carrierdetected[23]),
|
.rx_rmfifodatadeleted_23(pcs_rx_rmfifodatadeleted[23]),
|
.rx_rmfifodatadeleted_23(pcs_rx_rmfifodatadeleted[23]),
|
| Line 2683... |
Line 3266... |
.tx_ff_uflow_23(tx_ff_uflow_23), //OUTPUT : TX FIFO underflow occured (Synchronous with tx_clk)
|
.tx_ff_uflow_23(tx_ff_uflow_23), //OUTPUT : TX FIFO underflow occured (Synchronous with tx_clk)
|
.tx_crc_fwd_23(tx_crc_fwd_23), //INPUT : Forward Current Frame with CRC from Application
|
.tx_crc_fwd_23(tx_crc_fwd_23), //INPUT : Forward Current Frame with CRC from Application
|
.xoff_gen_23(xoff_gen_23), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xoff_gen_23(xoff_gen_23), //INPUT : XOFF PAUSE FRAME GENERATE
|
.xon_gen_23(xon_gen_23), //INPUT : XON PAUSE FRAME GENERATE
|
.xon_gen_23(xon_gen_23), //INPUT : XON PAUSE FRAME GENERATE
|
.magic_sleep_n_23(magic_sleep_n_23), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_sleep_n_23(magic_sleep_n_23), //INPUT : MAC SLEEP MODE CONTROL
|
.magic_wakeup_23(magic_wakeup_23)); //OUTPUT : MAC WAKE-UP INDICATION
|
.magic_wakeup_23(magic_wakeup_23), //OUTPUT : MAC WAKE-UP INDICATION
|
|
|
|
//IEEE1588's code
|
|
.tx_egress_timestamp_request_valid_23(tx_egress_timestamp_request_valid_23), //INPUT: Timestamp request valid from user
|
|
.tx_egress_timestamp_request_data_23(tx_egress_timestamp_request_data_23), //INPUT: Fingerprint associated to the timestamp request
|
|
.tx_egress_timestamp_valid_23(tx_egress_timestamp_valid_23), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_egress_timestamp_data_23(tx_egress_timestamp_data_23), //OUTPUT: Timestamp + Fingerprint from TSU
|
|
.tx_time_of_day_data_23(tx_time_of_day_data_23), //INPUT: Time of Day
|
|
.tx_ingress_timestamp_valid_23(tx_ingress_timestamp_valid_23), //INPUT: Timestamp to TSU
|
|
.tx_ingress_timestamp_data_23(tx_ingress_timestamp_data_23), //INPUT: Timestamp to TSU
|
|
.rx_ingress_timestamp_valid_23(rx_ingress_timestamp_valid_23), //OUTPUT: RX timestamp valid
|
|
.rx_ingress_timestamp_data_23(rx_ingress_timestamp_data_23), //OUTPUT: RX timestamp data
|
|
.rx_time_of_day_data_23(rx_time_of_day_data_23)); //INPUT: Time of Day
|
|
|
defparam
|
defparam
|
U_MULTI_MAC_PCS.USE_SYNC_RESET = USE_SYNC_RESET,
|
U_MULTI_MAC_PCS.USE_SYNC_RESET = USE_SYNC_RESET,
|
U_MULTI_MAC_PCS.RESET_LEVEL = RESET_LEVEL,
|
U_MULTI_MAC_PCS.RESET_LEVEL = RESET_LEVEL,
|
U_MULTI_MAC_PCS.ENABLE_GMII_LOOPBACK = ENABLE_GMII_LOOPBACK,
|
U_MULTI_MAC_PCS.ENABLE_GMII_LOOPBACK = ENABLE_GMII_LOOPBACK,
|
| Line 2721... |
Line 3316... |
U_MULTI_MAC_PCS.MAX_CHANNELS = MAX_CHANNELS,
|
U_MULTI_MAC_PCS.MAX_CHANNELS = MAX_CHANNELS,
|
U_MULTI_MAC_PCS.CHANNEL_WIDTH = CHANNEL_WIDTH,
|
U_MULTI_MAC_PCS.CHANNEL_WIDTH = CHANNEL_WIDTH,
|
U_MULTI_MAC_PCS.ENABLE_RX_FIFO_STATUS = ENABLE_RX_FIFO_STATUS,
|
U_MULTI_MAC_PCS.ENABLE_RX_FIFO_STATUS = ENABLE_RX_FIFO_STATUS,
|
U_MULTI_MAC_PCS.ENABLE_EXTENDED_STAT_REG = ENABLE_EXTENDED_STAT_REG,
|
U_MULTI_MAC_PCS.ENABLE_EXTENDED_STAT_REG = ENABLE_EXTENDED_STAT_REG,
|
U_MULTI_MAC_PCS.ENABLE_CLK_SHARING = ENABLE_CLK_SHARING,
|
U_MULTI_MAC_PCS.ENABLE_CLK_SHARING = ENABLE_CLK_SHARING,
|
U_MULTI_MAC_PCS.ENABLE_REG_SHARING = ENABLE_REG_SHARING;
|
U_MULTI_MAC_PCS.ENABLE_REG_SHARING = ENABLE_REG_SHARING,
|
|
U_MULTI_MAC_PCS.TSTAMP_FP_WIDTH = TSTAMP_FP_WIDTH,
|
|
U_MULTI_MAC_PCS.ENABLE_TIMESTAMPING = ENABLE_TIMESTAMPING,
|
|
U_MULTI_MAC_PCS.ENABLE_PTP_1STEP = ENABLE_PTP_1STEP;
|
|
|
|
|
|
|
// #######################################################################
|
// #######################################################################
|
// ############### CHANNEL 0 LOGIC/COMPONENTS ###############
|
// ############### CHANNEL 0 LOGIC/COMPONENTS ###############
|
| Line 2771... |
Line 3369... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[0]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[0]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[0]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[0]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[0])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[0])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_0.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_0.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_0.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_0
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_0
|
(
|
(
|
| Line 2812... |
Line 3411... |
.reconfig_fromgxb(reconfig_fromgxb_0)
|
.reconfig_fromgxb(reconfig_fromgxb_0)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_0.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_0.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_0.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_0.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_0.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_0.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_0.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_0 = {92{1'b0}};
|
assign reconfig_fromgxb_0 = {92{1'b0}};
|
| Line 2875... |
Line 3475... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[1]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[1]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[1]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[1]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[1])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[1])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_1.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_1.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_1.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_1
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_1
|
(
|
(
|
| Line 2916... |
Line 3517... |
.reconfig_fromgxb(reconfig_fromgxb_1)
|
.reconfig_fromgxb(reconfig_fromgxb_1)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_1.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_1.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_1.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_1.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_1.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_1.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_1.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_1 = {92{1'b0}};
|
assign reconfig_fromgxb_1 = {92{1'b0}};
|
| Line 2979... |
Line 3581... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[2]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[2]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[2]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[2]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[2])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[2])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_2.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_2.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_2.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_2
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_2
|
(
|
(
|
| Line 3020... |
Line 3623... |
.reconfig_fromgxb(reconfig_fromgxb_2)
|
.reconfig_fromgxb(reconfig_fromgxb_2)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_2.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_2.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_2.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_2.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_2.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_2.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_2.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_2 = {92{1'b0}};
|
assign reconfig_fromgxb_2 = {92{1'b0}};
|
| Line 3083... |
Line 3687... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[3]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[3]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[3]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[3]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[3])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[3])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_3.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_3.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_3.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_3
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_3
|
(
|
(
|
| Line 3124... |
Line 3729... |
.reconfig_fromgxb(reconfig_fromgxb_3)
|
.reconfig_fromgxb(reconfig_fromgxb_3)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_3.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_3.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_3.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_3.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_3.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_3.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_3.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_3 = {92{1'b0}};
|
assign reconfig_fromgxb_3 = {92{1'b0}};
|
| Line 3187... |
Line 3793... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[4]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[4]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[4]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[4]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[4])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[4])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_4.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_4.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_4.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_4
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_4
|
(
|
(
|
| Line 3228... |
Line 3835... |
.reconfig_fromgxb(reconfig_fromgxb_4)
|
.reconfig_fromgxb(reconfig_fromgxb_4)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_4.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_4.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_4.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_4.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_4.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_4.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_4.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_4 = {92{1'b0}};
|
assign reconfig_fromgxb_4 = {92{1'b0}};
|
| Line 3291... |
Line 3899... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[5]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[5]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[5]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[5]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[5])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[5])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_5.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_5.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_5.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_5
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_5
|
(
|
(
|
| Line 3332... |
Line 3941... |
.reconfig_fromgxb(reconfig_fromgxb_5)
|
.reconfig_fromgxb(reconfig_fromgxb_5)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_5.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_5.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_5.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_5.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_5.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_5.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_5.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_5 = {92{1'b0}};
|
assign reconfig_fromgxb_5 = {92{1'b0}};
|
| Line 3395... |
Line 4005... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[6]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[6]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[6]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[6]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[6])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[6])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_6.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_6.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_6.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_6
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_6
|
(
|
(
|
| Line 3436... |
Line 4047... |
.reconfig_fromgxb(reconfig_fromgxb_6)
|
.reconfig_fromgxb(reconfig_fromgxb_6)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_6.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_6.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_6.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_6.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_6.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_6.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_6.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_6 = {92{1'b0}};
|
assign reconfig_fromgxb_6 = {92{1'b0}};
|
| Line 3499... |
Line 4111... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[7]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[7]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[7]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[7]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[7])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[7])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_7.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_7.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_7.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_7
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_7
|
(
|
(
|
| Line 3540... |
Line 4153... |
.reconfig_fromgxb(reconfig_fromgxb_7)
|
.reconfig_fromgxb(reconfig_fromgxb_7)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_7.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_7.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_7.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_7.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_7.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_7.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_7.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_7 = {92{1'b0}};
|
assign reconfig_fromgxb_7 = {92{1'b0}};
|
| Line 3603... |
Line 4217... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[8]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[8]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[8]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[8]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[8])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[8])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_8.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_8.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_8.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_8
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_8
|
(
|
(
|
| Line 3644... |
Line 4259... |
.reconfig_fromgxb(reconfig_fromgxb_8)
|
.reconfig_fromgxb(reconfig_fromgxb_8)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_8.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_8.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_8.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_8.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_8.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_8.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_8.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_8 = {92{1'b0}};
|
assign reconfig_fromgxb_8 = {92{1'b0}};
|
| Line 3707... |
Line 4323... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[9]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[9]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[9]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[9]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[9])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[9])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_9.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_9.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_9.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_9
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_9
|
(
|
(
|
| Line 3748... |
Line 4365... |
.reconfig_fromgxb(reconfig_fromgxb_9)
|
.reconfig_fromgxb(reconfig_fromgxb_9)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_9.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_9.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_9.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_9.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_9.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_9.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_9.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_9 = {92{1'b0}};
|
assign reconfig_fromgxb_9 = {92{1'b0}};
|
| Line 3811... |
Line 4429... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[10]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[10]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[10]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[10]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[10])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[10])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_10.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_10.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_10.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_10
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_10
|
(
|
(
|
| Line 3852... |
Line 4471... |
.reconfig_fromgxb(reconfig_fromgxb_10)
|
.reconfig_fromgxb(reconfig_fromgxb_10)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_10.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_10.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_10.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_10.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_10.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_10.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_10.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_10 = {92{1'b0}};
|
assign reconfig_fromgxb_10 = {92{1'b0}};
|
| Line 3915... |
Line 4535... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[11]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[11]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[11]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[11]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[11])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[11])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_11.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_11.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_11.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_11
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_11
|
(
|
(
|
| Line 3956... |
Line 4577... |
.reconfig_fromgxb(reconfig_fromgxb_11)
|
.reconfig_fromgxb(reconfig_fromgxb_11)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_11.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_11.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_11.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_11.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_11.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_11.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_11.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_11 = {92{1'b0}};
|
assign reconfig_fromgxb_11 = {92{1'b0}};
|
| Line 4019... |
Line 4641... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[12]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[12]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[12]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[12]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[12])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[12])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_12.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_12.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_12.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_12
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_12
|
(
|
(
|
| Line 4060... |
Line 4683... |
.reconfig_fromgxb(reconfig_fromgxb_12)
|
.reconfig_fromgxb(reconfig_fromgxb_12)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_12.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_12.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_12.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_12.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_12.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_12.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_12.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_12 = {92{1'b0}};
|
assign reconfig_fromgxb_12 = {92{1'b0}};
|
| Line 4123... |
Line 4747... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[13]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[13]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[13]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[13]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[13])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[13])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_13.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_13.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_13.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_13
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_13
|
(
|
(
|
| Line 4164... |
Line 4789... |
.reconfig_fromgxb(reconfig_fromgxb_13)
|
.reconfig_fromgxb(reconfig_fromgxb_13)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_13.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_13.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_13.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_13.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_13.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_13.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_13.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_13 = {92{1'b0}};
|
assign reconfig_fromgxb_13 = {92{1'b0}};
|
| Line 4227... |
Line 4853... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[14]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[14]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[14]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[14]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[14])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[14])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_14.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_14.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_14.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_14
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_14
|
(
|
(
|
| Line 4268... |
Line 4895... |
.reconfig_fromgxb(reconfig_fromgxb_14)
|
.reconfig_fromgxb(reconfig_fromgxb_14)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_14.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_14.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_14.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_14.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_14.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_14.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_14.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_14 = {92{1'b0}};
|
assign reconfig_fromgxb_14 = {92{1'b0}};
|
| Line 4331... |
Line 4959... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[15]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[15]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[15]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[15]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[15])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[15])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_15.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_15.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_15.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_15
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_15
|
(
|
(
|
| Line 4372... |
Line 5001... |
.reconfig_fromgxb(reconfig_fromgxb_15)
|
.reconfig_fromgxb(reconfig_fromgxb_15)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_15.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_15.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_15.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_15.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_15.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_15.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_15.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_15 = {92{1'b0}};
|
assign reconfig_fromgxb_15 = {92{1'b0}};
|
| Line 4435... |
Line 5065... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[16]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[16]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[16]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[16]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[16])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[16])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_16.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_16.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_16.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_16
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_16
|
(
|
(
|
| Line 4476... |
Line 5107... |
.reconfig_fromgxb(reconfig_fromgxb_16)
|
.reconfig_fromgxb(reconfig_fromgxb_16)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_16.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_16.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_16.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_16.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_16.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_16.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_16.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_16 = {92{1'b0}};
|
assign reconfig_fromgxb_16 = {92{1'b0}};
|
| Line 4539... |
Line 5171... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[17]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[17]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[17]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[17]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[17])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[17])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_17.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_17.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_17.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_17
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_17
|
(
|
(
|
| Line 4580... |
Line 5213... |
.reconfig_fromgxb(reconfig_fromgxb_17)
|
.reconfig_fromgxb(reconfig_fromgxb_17)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_17.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_17.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_17.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_17.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_17.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_17.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_17.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_17 = {92{1'b0}};
|
assign reconfig_fromgxb_17 = {92{1'b0}};
|
| Line 4643... |
Line 5277... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[18]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[18]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[18]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[18]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[18])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[18])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_18.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_18.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_18.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_18
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_18
|
(
|
(
|
| Line 4684... |
Line 5319... |
.reconfig_fromgxb(reconfig_fromgxb_18)
|
.reconfig_fromgxb(reconfig_fromgxb_18)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_18.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_18.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_18.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_18.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_18.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_18.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_18.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_18 = {92{1'b0}};
|
assign reconfig_fromgxb_18 = {92{1'b0}};
|
| Line 4747... |
Line 5383... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[19]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[19]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[19]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[19]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[19])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[19])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_19.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_19.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_19.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_19
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_19
|
(
|
(
|
| Line 4788... |
Line 5425... |
.reconfig_fromgxb(reconfig_fromgxb_19)
|
.reconfig_fromgxb(reconfig_fromgxb_19)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_19.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_19.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_19.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_19.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_19.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_19.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_19.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_19 = {92{1'b0}};
|
assign reconfig_fromgxb_19 = {92{1'b0}};
|
| Line 4851... |
Line 5489... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[20]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[20]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[20]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[20]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[20])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[20])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_20.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_20.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_20.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_20
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_20
|
(
|
(
|
| Line 4892... |
Line 5531... |
.reconfig_fromgxb(reconfig_fromgxb_20)
|
.reconfig_fromgxb(reconfig_fromgxb_20)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_20.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_20.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_20.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_20.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_20.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_20.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_20.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_20 = {92{1'b0}};
|
assign reconfig_fromgxb_20 = {92{1'b0}};
|
| Line 4955... |
Line 5595... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[21]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[21]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[21]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[21]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[21])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[21])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_21.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_21.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_21.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_21
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_21
|
(
|
(
|
| Line 4996... |
Line 5637... |
.reconfig_fromgxb(reconfig_fromgxb_21)
|
.reconfig_fromgxb(reconfig_fromgxb_21)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_21.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_21.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_21.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_21.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_21.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_21.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_21.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_21 = {92{1'b0}};
|
assign reconfig_fromgxb_21 = {92{1'b0}};
|
| Line 5059... |
Line 5701... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[22]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[22]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[22]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[22]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[22])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[22])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_22.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_22.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_22.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_22
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_22
|
(
|
(
|
| Line 5100... |
Line 5743... |
.reconfig_fromgxb(reconfig_fromgxb_22)
|
.reconfig_fromgxb(reconfig_fromgxb_22)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_22.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_22.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_22.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_22.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_22.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_22.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_22.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_22 = {92{1'b0}};
|
assign reconfig_fromgxb_22 = {92{1'b0}};
|
| Line 5163... |
Line 5807... |
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[23]),
|
.altpcs_rmfifodatadeleted(pcs_rx_rmfifodatadeleted[23]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[23]),
|
.altpcs_rmfifodatainserted(pcs_rx_rmfifodatainserted[23]),
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[23])
|
.altpcs_carrierdetect(pcs_rx_carrierdetected[23])
|
) ;
|
) ;
|
defparam
|
defparam
|
the_altera_tse_gxb_aligned_rxsync_23.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_aligned_rxsync_23.DEVICE_FAMILY = DEVICE_FAMILY,
|
|
the_altera_tse_gxb_aligned_rxsync_23.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING;
|
|
|
// Altgxb in GIGE mode
|
// Altgxb in GIGE mode
|
// --------------------
|
// --------------------
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_23
|
altera_tse_gxb_gige_phyip_inst the_altera_tse_gxb_gige_phyip_inst_23
|
(
|
(
|
| Line 5204... |
Line 5849... |
.reconfig_fromgxb(reconfig_fromgxb_23)
|
.reconfig_fromgxb(reconfig_fromgxb_23)
|
);
|
);
|
defparam
|
defparam
|
the_altera_tse_gxb_gige_phyip_inst_23.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_23.ENABLE_ALT_RECONFIG = ENABLE_ALT_RECONFIG,
|
the_altera_tse_gxb_gige_phyip_inst_23.ENABLE_SGMII = ENABLE_SGMII,
|
the_altera_tse_gxb_gige_phyip_inst_23.ENABLE_SGMII = ENABLE_SGMII,
|
|
the_altera_tse_gxb_gige_phyip_inst_23.ENABLE_DET_LATENCY = ENABLE_TIMESTAMPING,
|
the_altera_tse_gxb_gige_phyip_inst_23.DEVICE_FAMILY = DEVICE_FAMILY;
|
the_altera_tse_gxb_gige_phyip_inst_23.DEVICE_FAMILY = DEVICE_FAMILY;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
assign reconfig_fromgxb_23 = {92{1'b0}};
|
assign reconfig_fromgxb_23 = {92{1'b0}};
|
