OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [testbenches/] [verilog/] [tb.ext_m] - Diff between revs 131 and 133

Show entire file | Details | Blame | View Log

Rev 131 Rev 133
Line 17... Line 17... 
pullup mdb_14(MEMDB[14]);
 
pullup mdb_14(MEMDB[14]);
 
pullup mdb_15(MEMDB[15]);
 
pullup mdb_15(MEMDB[15]);
 
 
 
 
 
pullup pu_ramwait ( ramwait_in );
 
pullup pu_ramwait ( ramwait_in );
 
 
 
 
 
mt45w8mw12_def
 
 
 
psram (
 
 
 
    .clk    ( ramclk_out    ),
 
 
 
    .adv_n  ( ramadv_n_out  ),
 
 
 
    .cre    ( ramcre_out    ),
 
 
 
    .o_wait ( ramwait_in    ),
 
 
 
    .ce_n   ( ramcs_n_out   ),
 
 
 
    .oe_n   ( memoe_n_out   ),
 
 
 
    .we_n   ( memwr_n_out   ),
 
 
 
    .lb_n   ( ramlb_n_out   ),
 
 
 
    .ub_n   ( ramub_n_out   ),
 
 
 
    .addr   ( memadr_out    ),
 
 
 
    .dq     ( MEMDB         )
 
 
 
);
 
 
 
 
 
 
 
 
 
 
 
assign STOP = 1'b0;
 
assign STOP = 1'b0;
 
assign BAD = 1'b0;
 
assign BAD = 1'b0;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.