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Welcome to the the SOCGEN design environment
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Welcome to the the SOCGEN design environment
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This is the Dec 2014 major revision. Some IP has been trimmed out due to tool issues
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so it is smaller but should provide enough examples. Once downloaded you should execute
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the install script in socgen/tools/install/Ubuntu_14.10. The only other tool that you will
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need is Xilinx webpack 13.3 to do fpgas. Verilator is currently not running correctly.
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run the socgen/test script from the socgen directory to build all ip and run simulations and
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synthesys. Afterwords you can run check_sims ad check_fpgas to see the results.
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All work is done in the socgen/work directory. Simulations are run in
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socgen/work/vendor__library/ip/component/sim/icarus/test_name directory. There you will
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find the dump and log files and can rerun the sim with "make sim"
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code coverage results are in
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socgen/work/vendor__library/ip/component/sim/cov/testbench_name
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fpga results are in
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socgen/work/vendor__library/ip/component/syn/ise/fpga_name/debug
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To build a database type:
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To build a database type:
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make workspace
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make workspace
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To compile all software:
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To compile all software:
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make build_obj
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make build_sw
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make build_sw
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