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Welcome to the the SOCGEN design environment
Welcome to the the SOCGEN design environment
 
 
 
This is the Dec 2014 major revision. Some IP has been trimmed out due to tool issues
 
so it is smaller but should provide enough examples. Once downloaded you should execute
 
the install script in socgen/tools/install/Ubuntu_14.10. The only other tool that you will
 
need is Xilinx webpack 13.3 to do fpgas. Verilator is currently not running correctly.
 
 
 
 
 
 
 
 
 
run the socgen/test script from the socgen directory to build all ip and run simulations and
 
synthesys. Afterwords you can run check_sims ad check_fpgas to see the results.
 
 
 
 
 
All work is done in the socgen/work directory. Simulations are run in
 
socgen/work/vendor__library/ip/component/sim/icarus/test_name directory. There you will
 
find the dump and log files and can rerun the sim with "make sim"
 
 
 
 
 
 
 
code coverage results are in
 
 
 
socgen/work/vendor__library/ip/component/sim/cov/testbench_name
 
 
 
 
 
fpga results are in
 
 
 
 
 
socgen/work/vendor__library/ip/component/syn/ise/fpga_name/debug
 
 
 
 
 
 
 
 
 
 
To build a database type:
To build a database type:
 
 
 
 
make workspace
make workspace
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To compile all software:
To compile all software:
 
 
 
make build_obj
make build_sw
make build_sw
 
 
 
 
 
 
 
 

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