OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [bfms/] [mt45w8mw12/] [rtl/] [verilog/] [top.syn] - Diff between revs 131 and 133

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 131 Rev 133
Line 2... Line 2...
 
 
module mt45w8mw12_def
module mt45w8mw12_def
#(
#(
    parameter ADDR_BITS      = 23,
    parameter ADDR_BITS      = 23,
    parameter DQ_BITS        = 16,
    parameter DQ_BITS        = 16,
    parameter MEM_BITS       = 16,
    parameter MEM_BITS       = 16
    parameter INIT_FILE_E   = "NONE",
 
    parameter INIT_FILE_O   = "NONE"
 
 
 
  )
  )
 
 
(
(
    input  wire                       clk,
    input  wire                       clk,

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.