URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [mult/] [sim/] [testbenches/] [verilog/] [top] - Diff between revs 131 and 133

Rev 131	Rev 133
Line 8...	Line 8...
`reg ex_freeze_R;`	`reg ex_freeze_R;`
`reg mask_R;`	`reg mask_R;`



	`assign mul_prod_exp_P = mul_prod_exp_R;`

`assign a_in = a_in_R;`	`assign a_in = a_in_R;`
`assign b_in = b_in_R;`	`assign b_in = b_in_R;`
`assign alu_op_mul = alu_op_mul_R;`	`assign alu_op_mul = alu_op_mul_R;`
`assign ex_freeze = ex_freeze_R;`	`assign ex_freeze = ex_freeze_R;`



	`assign mask = {32{mask_R}};`

`io_probe_in`
`#(.MESG ("multiply error"),`
`.WIDTH (32)`
`)`
`rdata_tpb`
`(`
`.clk ( clk ),`
`.expected_value ( mul_prod_exp_R[31:0] ),`
`.mask ( {32{mask_R}} ),`
`.signal ( mul_prod_r[31:0] )`
`);`

`ifndef SYNTHESYS	`ifndef SYNTHESYS

`task u_cmp;`	`task u_cmp;`
`input [31:0] a_in;`	`input [31:0] a_in;`