| Line 123... |
Line 123... |
my @components = yp::lib::find_components("socgen:componentConfiguration",$vendor,$project);
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my @components = yp::lib::find_components("socgen:componentConfiguration",$vendor,$project);
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foreach my $component (@components)
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foreach my $component (@components)
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{
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{
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my $sogen_file = $parser->parse_file(yp::lib::find_socgen("socgen:componentConfiguration",$vendor,$project,$component));
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my $sogen_file = $parser->parse_file(yp::lib::find_socgen("socgen:componentConfiguration",$vendor,$project,$component));
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my $sim_library_path = $sogen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:library_path/text()")->to_literal;
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#/*********************************************************************************************/
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#/*********************************************************************************************/
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#/ files for simulation */
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#/ files for simulation */
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#/ */
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#/ */
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#/*********************************************************************************************/
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#/*********************************************************************************************/
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| Line 136... |
Line 139... |
my($sim_name) = $i_name ->findnodes('./text()')->to_literal ;
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my($sim_name) = $i_name ->findnodes('./text()')->to_literal ;
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my($sim_configuration) = $i_name ->findnodes('../socgen:configuration/text()')->to_literal ;
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my($sim_configuration) = $i_name ->findnodes('../socgen:configuration/text()')->to_literal ;
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my($sim_variant) = $i_name ->findnodes('../socgen:variant/text()')->to_literal ;
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my($sim_variant) = $i_name ->findnodes('../socgen:variant/text()')->to_literal ;
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print " SIMs $sim_name $sim_configuration $sim_variant ";
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print " SIMs $sim_name $sim_configuration $sim_variant ";
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chdir ".${work_site}/${vendor}__${project}/ip/${component}/sim/icarus/${sim_name}";
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chdir ".${work_site}/${vendor}__${project}${sim_library_path}/icarus/${sim_name}";
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$cmd ="iverilog -f filelist.sim -D VCD TestBench 2> ./${sim_name}_sim.log | tee >> ./${$sim_name}_sim.log \n";
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$cmd ="iverilog -f ../../testbenches/filelists/${sim_variant}.sim -D VCD 2> ./${sim_name}_elab.log | tee >> ./${$sim_name}_elab.log \n";
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if (system($cmd)) {}
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if (system($cmd)) {}
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$cmd ="./a.out 2> ./${sim_name}_sim.log | tee >> ./${sim_name}_sim.log \n";
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$cmd ="./a.out 2> ./${sim_name}_sim.log | tee >> ./${sim_name}_sim.log \n";
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if (system($cmd)) {}
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if (system($cmd)) {}
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$cmd ="grep PASSED ./${sim_name}_sim.log \n";
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$cmd ="grep PASSED ./${sim_name}_sim.log \n";
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if (system($cmd)) {}
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if (system($cmd)) {}
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| Line 158... |
Line 161... |
{
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{
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my($sim_name) = $i_name ->findnodes('./text()')->to_literal ;
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my($sim_name) = $i_name ->findnodes('./text()')->to_literal ;
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my($sim_configuration) = $i_name ->findnodes('../socgen:configuration/text()')->to_literal ;
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my($sim_configuration) = $i_name ->findnodes('../socgen:configuration/text()')->to_literal ;
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my($sim_variant) = $i_name ->findnodes('../socgen:variant/text()')->to_literal ;
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my($sim_variant) = $i_name ->findnodes('../socgen:variant/text()')->to_literal ;
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print " VSIMs $sim_name $sim_configuration $sim_variant ";
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print " VSIMs $sim_name $sim_configuration $sim_variant ";
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chdir ".${work_site}/${vendor}__${project}/ip/${component}/sim/verilator/${sim_name}";
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chdir ".${work_site}/${vendor}__${project}${sim_library_path}/verilator/${sim_name}";
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$cmd ="make verilator\n";
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$cmd ="make verilator\n";
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if (system($cmd)) {}
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if (system($cmd)) {}
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chdir $home;
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chdir $home;
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}
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}
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