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/*******************************************************************************
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/*******************************************************************************
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*
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*
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* Copyright 2012-2013, Sinclair R.F., Inc.
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* Copyright 2012-2014, Sinclair R.F., Inc.
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*
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*
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* SSBCC.9x8 -- Small Stack Based Computer Compiler, 9-bit opcode, 8-bit data.
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* SSBCC.9x8 -- Small Stack Based Computer Compiler, 9-bit opcode, 8-bit data.
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*
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*
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* The repository for this open-source project is at
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* The repository for this open-source project is at
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* https://github.com/sinclairrf/SSBCC
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* https://github.com/sinclairrf/SSBCC
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//@SSBCC@ signals
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//@SSBCC@ signals
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/*******************************************************************************
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/*******************************************************************************
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*
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*
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* Instantiate the ALU operations. These are listed in the order in which they
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* Instantiate the ALU operations. These are listed in order by opcode.
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* first occur in the opcodes.
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*
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*
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******************************************************************************/
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******************************************************************************/
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reg [8:0] s_T_adder;
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// opcode = 000000_xxx
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// opcode = 000000_xxx
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// shifter operations (including "nop" as no shift)
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// shifter operations (including "nop" as no shift)
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// 6-input LUT formulation -- 3-bit opcode, 3 bits of T centered at current bit
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// 6-input LUT formulation -- 3-bit opcode, 3 bits of T centered at current bit
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reg [7:0] s_math_rotate;
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reg [7:0] s_math_rotate;
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always @ (s_T,s_opcode)
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always @ (s_T,s_opcode)
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always @ (*)
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always @ (*)
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case (s_opcode[0+:2])
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case (s_opcode[0+:2])
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2'b00 : s_T_stack = s_T; // dup
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2'b00 : s_T_stack = s_T; // dup
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2'b01 : s_T_stack = s_R[0+:8]; // r@
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2'b01 : s_T_stack = s_R[0+:8]; // r@
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2'b10 : s_T_stack = s_N; // over
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2'b10 : s_T_stack = s_N; // over
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2'b11 : s_T_stack = { 7'd0, s_T_adder[8] }; // +/-c
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default : s_T_stack = s_T;
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default : s_T_stack = s_T;
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endcase
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endcase
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// opcode = 000011_x00 (adder) and 001xxx_x.. (incrementers)
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// opcode = 000011_x00 (adder) and 001xxx_x.. (incrementers)
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reg [7:0] s_T_adder;
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always @ (*)
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always @ (*)
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if (s_opcode[6] == 1'b0)
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if (s_opcode[6] == 1'b0)
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case (s_opcode[2])
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case (s_opcode[2])
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1'b0: s_T_adder = s_N + s_T;
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1'b0: s_T_adder = { 1'b0, s_N } + { 1'b0, s_T };
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1'b1: s_T_adder = s_N - s_T;
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1'b1: s_T_adder = { 1'b0, s_N } - { 1'b0, s_T };
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endcase
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endcase
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else
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else begin
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case (s_opcode[2])
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case (s_opcode[2])
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1'b0: s_T_adder = s_T + 8'h01;
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1'b0: s_T_adder = { 1'b0, s_T } + 9'h01;
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1'b1: s_T_adder = s_T - 8'h01;
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1'b1: s_T_adder = { 1'b0, s_T } - 9'h01;
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default: s_T_adder = s_T + 8'h01;
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default: s_T_adder = { 1'b0, s_T } + 9'h01;
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endcase
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endcase
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end
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// opcode = 000100_0xx
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// opcode = 000100_0xx
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// ^ 0 ==> "=", 1 ==> "<>"
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// ^ 0 ==> "=", 1 ==> "<>"
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// ^ 0 ==> all zero, 1 ==> all ones
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// ^ 0 ==> all zero, 1 ==> all ones
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wire s_T_compare = s_opcode[0] ^ &(s_T == {(8){s_opcode[1]}});
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wire s_T_compare = s_opcode[0] ^ &(s_T == {(8){s_opcode[1]}});
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s_bus_n = C_BUS_N_STACK;
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s_bus_n = C_BUS_N_STACK;
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s_stack = C_STACK_DEC;
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s_stack = C_STACK_DEC;
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end else case (s_opcode[3+:4])
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end else case (s_opcode[3+:4])
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4'b0000: // nop, math_rotate
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4'b0000: // nop, math_rotate
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;
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;
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4'b0001: begin // dup, r@, over
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4'b0001: begin // dup, r@, over, +/-c
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s_bus_t = C_BUS_T_PRE;
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s_bus_t = C_BUS_T_PRE;
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s_bus_n = C_BUS_N_T;
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s_bus_n = C_BUS_N_T;
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s_stack = C_STACK_INC;
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s_stack = C_STACK_INC;
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end
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end
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4'b0010: begin // swap
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4'b0010: begin // swap
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case (s_bus_t)
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case (s_bus_t)
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C_BUS_T_MATH_ROTATE: s_T_pre = s_math_rotate;
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C_BUS_T_MATH_ROTATE: s_T_pre = s_math_rotate;
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C_BUS_T_OPCODE: s_T_pre = s_opcode[0+:8]; // push 8-bit value
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C_BUS_T_OPCODE: s_T_pre = s_opcode[0+:8]; // push 8-bit value
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C_BUS_T_N: s_T_pre = s_N;
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C_BUS_T_N: s_T_pre = s_N;
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C_BUS_T_PRE: s_T_pre = s_T_stack;
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C_BUS_T_PRE: s_T_pre = s_T_stack;
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C_BUS_T_ADDER: s_T_pre = s_T_adder;
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C_BUS_T_ADDER: s_T_pre = s_T_adder[0+:8];
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C_BUS_T_COMPARE: s_T_pre = {(8){s_T_compare}};
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C_BUS_T_COMPARE: s_T_pre = {(8){s_T_compare}};
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C_BUS_T_INPORT: s_T_pre = s_T_inport;
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C_BUS_T_INPORT: s_T_pre = s_T_inport;
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C_BUS_T_LOGIC: s_T_pre = s_T_logic;
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C_BUS_T_LOGIC: s_T_pre = s_T_logic;
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C_BUS_T_MEM: s_T_pre = s_memory;
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C_BUS_T_MEM: s_T_pre = s_memory;
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default: s_T_pre = s_T;
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default: s_T_pre = s_T;
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