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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [big_outport/] [tb_big_outport.9x8] - Diff between revs 2 and 3

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Rev 2 Rev 3
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#
#
# Copyright 2013, Sinclair R.F., Inc.
# Copyright 2013-2014, Sinclair R.F., Inc.
#
#
# Test bench for PWM_8bit peripheral.
# Test bench for big_outport peripheral.
#
#
 
 
ARCHITECTURE    core/9x8 Verilog
ARCHITECTURE    core/9x8 Verilog
INSTRUCTION     128
INSTRUCTION     128
DATA_STACK      32
DATA_STACK      32

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