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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_io.v] - Diff between revs 255 and 258

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Rev 255 Rev 258
Line 39... Line 39...
////                                                                    ////
////                                                                    ////
////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////
 
 
`include "timescale.v"
`include "timescale.v"
`include "stubs.v"
`include "stubs.v"
module t6507lp_io(clk, reset_n, data_in, rw_mem, data_out, address);
module t6507lp_io(clk, reset_n, scan_enable, data_in, rw_mem, data_out, address);
        parameter [3:0] DATA_SIZE = 4'd8;
        parameter [3:0] DATA_SIZE = 4'd8;
        parameter [3:0] ADDR_SIZE = 4'd13;
        parameter [3:0] ADDR_SIZE = 4'd13;
 
 
        localparam [3:0] DATA_SIZE_ = DATA_SIZE - 4'b0001;
        localparam [3:0] DATA_SIZE_ = DATA_SIZE - 4'b0001;
        localparam [3:0] ADDR_SIZE_ = ADDR_SIZE - 4'b0001;
        localparam [3:0] ADDR_SIZE_ = ADDR_SIZE - 4'b0001;
Line 52... Line 52...
        wire clkIO;
        wire clkIO;
 
 
        input reset_n;
        input reset_n;
        wire reset_nIO;
        wire reset_nIO;
 
 
 
        input scan_enable;
 
        wire scan_enableIO;
 
 
        input [DATA_SIZE_:0] data_in;
        input [DATA_SIZE_:0] data_in;
        reg [DATA_SIZE_:0] data_inIO;
        reg [DATA_SIZE_:0] data_inIO;
 
 
        output rw_mem;
        output rw_mem;
        wire rw_memIO;
        wire rw_memIO;
Line 64... Line 67...
        reg [DATA_SIZE_:0] data_outIO;
        reg [DATA_SIZE_:0] data_outIO;
 
 
        output [ADDR_SIZE_:0] address;
        output [ADDR_SIZE_:0] address;
        reg [ADDR_SIZE_:0] addressIO;
        reg [ADDR_SIZE_:0] addressIO;
 
 
        wire clampc;
        wire pipo0, pipo1, pipo2, pipo3, pipo4, pipo5, pipo6, pipo7, pipo8, pipo9, pipo10, chainfinal;
        wire pipo1, pipo2, pipo3, pipo4, pipo5, pipo6, pipo7, pipo8, pipo9, chainfinal;
 
 
 
        wire muxed;
        wire muxed;
 
 
        t6507lp t6507lp(  //core
        t6507lp t6507lp(  //core
                .clk            (clkIO),
                .clk            (clkIO),
Line 78... Line 80...
                .rw_mem         (rw_memIO),
                .rw_mem         (rw_memIO),
                .data_out       (data_outIO),
                .data_out       (data_outIO),
                .address        (addressIO)
                .address        (addressIO)
        );
        );
 
 
        assign muxed = (reset_nIO == 0) ? chainfinal : rw_memIO;
        wire vdd, gnd, dummy_clampc;
 
 
        wire dummy_vdd, dummy_gnd, dummy_clampc;
        ICP scan_pad(
 
                .PAD    (scan_enable),
 
                .PI     (pipo10),
 
                .GND5O  (gnd),
 
                .GND5R  (gnd),
 
                .VDD5O  (vdd),
 
                .VDD5R  (vdd),
 
                .CLAMPC (dummy_clampc),
 
                .PO     (chain_final),
 
                .Y      (scan_enableIO)
 
        );
 
 
 
/*      ICP test_pad(
 
                .PAD    (pintest),
 
                .PI     (1'b1),
 
                .GND5O  (gnd),
 
                .GND5R  (gnd),
 
                .VDD5O  (vdd),
 
                .VDD5R  (vdd),
 
                .CLAMPC (dummy_clampc),
 
                .PO     (pipo0),
 
                .Y      (pintestIO)
 
        );
 
*/
        ICP clk_pad(
        ICP clk_pad(
                .PAD    (clk),
                .PAD    (clk),
                .PI     (pipo9),
                .PI     (pipo9),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (chain_final),
                .PO     (pipo10),
                .Y      (clkIO)
                .Y      (clkIO)
        );
        );
 
 
        ICP reset_n_pad(
        ICP reset_n_pad(
                .PAD    (reset_n),
                .PAD    (reset_n),
                .PI     (pipo8),
                .PI     (pipo8),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo9),
                .PO     (pipo9),
                .Y      (reset_nIO)
                .Y      (reset_nIO)
        );
        );
 
 
        ICP data_in_pad0(
        ICP data_in_pad0(
                .PAD    (data_in[0]),
                .PAD    (data_in[0]),
                .PI     (pipo7),
                .PI     (pipo7),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo8),
                .PO     (pipo8),
                .Y      (data_inIO[0])
                .Y      (data_inIO[0])
        );
        );
 
 
        ICP data_in_pad1(
        ICP data_in_pad1(
                .PAD    (data_in[1]),
                .PAD    (data_in[1]),
                .PI     (pipo6),
                .PI     (pipo6),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo7),
                .PO     (pipo7),
                .Y      (data_inIO[1])
                .Y      (data_inIO[1])
        );
        );
 
 
        ICP data_in_pad2(
        ICP data_in_pad2(
                .PAD    (data_in[2]),
                .PAD    (data_in[2]),
                .PI     (pipo5),
                .PI     (pipo5),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo6),
                .PO     (pipo6),
                .Y      (data_inIO[2])
                .Y      (data_inIO[2])
        );
        );
 
 
        ICP data_in_pad3(
        ICP data_in_pad3(
                .PAD    (data_in[3]),
                .PAD    (data_in[3]),
                .PI     (pipo4),
                .PI     (pipo4),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo5),
                .PO     (pipo5),
                .Y      (data_inIO[3])
                .Y      (data_inIO[3])
        );
        );
 
 
        ICP data_in_pad4(
        ICP data_in_pad4(
                .PAD    (data_in[4]),
                .PAD    (data_in[4]),
                .PI     (pipo3),
                .PI     (pipo3),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo4),
                .PO     (pipo4),
                .Y      (data_inIO[4])
                .Y      (data_inIO[4])
        );
        );
 
 
        ICP data_in_pad5(
        ICP data_in_pad5(
                .PAD    (data_in[5]),
                .PAD    (data_in[5]),
                .PI     (pipo2),
                .PI     (pipo2),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo3),
                .PO     (pipo3),
                .Y      (data_inIO[5])
                .Y      (data_inIO[5])
        );
        );
 
 
        ICP data_in_pad6(
        ICP data_in_pad6(
                .PAD    (data_in[6]),
                .PAD    (data_in[6]),
                .PI     (pipo1),
                .PI     (pipo1),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo2),
                .PO     (pipo2),
                .Y      (data_inIO[6])
                .Y      (data_inIO[6])
        );
        );
 
 
        ICP data_in_pad7(
        ICP data_in_pad7(
                .PAD    (data_in[7]),
                .PAD    (data_in[7]),
                .PI     (dummy_vdd),
                .PI     (pipo0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PO     (pipo1),
                .PO     (pipo1),
                .Y      (data_inIO[7])
                .Y      (data_inIO[7])
        );
        );
 
 
        BT4P rw_mem_pad(
        BT4P rw_mem_pad(
                .A      (muxed),
                .A      (muxed),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (rw_mem)
                .PAD    (rw_mem)
        );
        );
 
 
        BT4P data_out_pad0(
        BT4P data_out_pad0(
                .A      (data_outIO[0]),
                .A      (data_outIO[0]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[0])
                .PAD    (data_out[0])
        );
        );
 
 
        BT4P data_out_pad1(
        BT4P data_out_pad1(
                .A      (data_outIO[1]),
                .A      (data_outIO[1]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[1])
                .PAD    (data_out[1])
        );
        );
 
 
        BT4P data_out_pad2(
        BT4P data_out_pad2(
                .A      (data_outIO[2]),
                .A      (data_outIO[2]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[2])
                .PAD    (data_out[2])
        );
        );
 
 
        BT4P data_out_pad3(
        BT4P data_out_pad3(
                .A      (data_outIO[3]),
                .A      (data_outIO[3]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[3])
                .PAD    (data_out[3])
        );
        );
 
 
        BT4P data_out_pad4(
        BT4P data_out_pad4(
                .A      (data_outIO[4]),
                .A      (data_outIO[4]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[4])
                .PAD    (data_out[4])
        );
        );
 
 
        BT4P data_out_pad5(
        BT4P data_out_pad5(
                .A      (data_outIO[5]),
                .A      (data_outIO[5]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[5])
                .PAD    (data_out[5])
        );
        );
 
 
        BT4P data_out_pad6(
        BT4P data_out_pad6(
                .A      (data_outIO[6]),
                .A      (data_outIO[6]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[6])
                .PAD    (data_out[6])
        );
        );
 
 
        BT4P data_out_pad7(
        BT4P data_out_pad7(
                .A      (data_outIO[7]),
                .A      (data_outIO[7]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (data_out[7])
                .PAD    (data_out[7])
        );
        );
 
 
        BT4P address_pad0(
        BT4P address_pad0(
                .A      (addressIO[0]),
                .A      (addressIO[0]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[0])
                .PAD    (address[0])
        );
        );
 
 
        BT4P address_pad1(
        BT4P address_pad1(
                .A      (addressIO[1]),
                .A      (addressIO[1]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[1])
                .PAD    (address[1])
        );
        );
        BT4P address_pad2(
        BT4P address_pad2(
                .A      (addressIO[2]),
                .A      (addressIO[2]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[2])
                .PAD    (address[2])
        );
        );
        BT4P address_pad3(
        BT4P address_pad3(
                .A      (addressIO[3]),
                .A      (addressIO[3]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[3])
                .PAD    (address[3])
        );
        );
        BT4P address_pad4(
        BT4P address_pad4(
                .A      (addressIO[4]),
                .A      (addressIO[4]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[4])
                .PAD    (address[4])
        );
        );
        BT4P address_pad5(
        BT4P address_pad5(
                .A      (addressIO[5]),
                .A      (addressIO[5]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[5])
                .PAD    (address[5])
        );
        );
        BT4P address_pad6(
        BT4P address_pad6(
                .A      (addressIO[6]),
                .A      (addressIO[6]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[6])
                .PAD    (address[6])
        );
        );
        BT4P address_pad7(
        BT4P address_pad7(
                .A      (addressIO[7]),
                .A      (addressIO[7]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[7])
                .PAD    (address[7])
        );
        );
        BT4P address_pad8(
        BT4P address_pad8(
                .A      (addressIO[8]),
                .A      (addressIO[8]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[8])
                .PAD    (address[8])
        );
        );
        BT4P address_pad9(
        BT4P address_pad9(
                .A      (addressIO[9]),
                .A      (addressIO[9]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[9])
                .PAD    (address[9])
        );
        );
        BT4P address_pad10(
        BT4P address_pad10(
                .A      (addressIO[10]),
                .A      (addressIO[10]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[10])
                .PAD    (address[10])
        );
        );
        BT4P address_pad11(
        BT4P address_pad11(
                .A      (addressIO[11]),
                .A      (addressIO[11]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[11])
                .PAD    (address[11])
        );
        );
 
 
        BT4P address_pad12(
        BT4P address_pad12(
                .A      (addressIO[12]),
                .A      (addressIO[12]),
                .EN     (dummy_gnd),
                .EN     (1'b0),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .PAD    (address[12])
                .PAD    (address[12])
        );
        );
 
 
        CORNERCLMP left_up_pad (
        CORNERCLMP left_up_pad (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd)
                .GND5R  (gnd)
        );
        );
 
 
        CORNERCLMP left_down_pad (
        CORNERCLMP left_down_pad (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd)
                .GND5R  (gnd)
        );
        );
 
 
        CORNERCLMP right_up_pad (
        CORNERCLMP right_up_pad (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd)
                .GND5R  (gnd)
        );
        );
 
 
        CORNERCLMP right_down_pad (
        CORNERCLMP right_down_pad (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd)
                .GND5R  (gnd)
        );
        );
 
 
        GND5ALLPADP gnd_pad_left (
        GND5ALLPADP gnd_pad_left (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND    (dummy_gnd)
                .GND    (gnd)
        );
        );
 
 
        GND5ALLPADP gnd_pad_right (
        GND5ALLPADP gnd_pad_right (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND    (dummy_gnd)
                .GND    (gnd)
        );
        );
 
 
        GND5ALLPADP gnd_pad_up (
        GND5ALLPADP gnd_pad_up (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND    (dummy_gnd)
                .GND    (gnd)
        );
        );
 
 
        GND5ALLPADP gnd_pad_down (
        GND5ALLPADP gnd_pad_down (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .VDD5O  (dummy_vdd),
                .VDD5O  (vdd),
                .VDD5R  (dummy_vdd),
                .VDD5R  (vdd),
                .GND    (dummy_gnd)
                .GND    (gnd)
        );
        );
 
 
        VDD5ALLPADP vdd_pad_left (
        VDD5ALLPADP vdd_pad_left (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD    (dummy_vdd)
                .VDD    (vdd)
        );
        );
 
 
        VDD5ALLPADP vdd_pad_right (
        VDD5ALLPADP vdd_pad_right (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD    (dummy_vdd)
                .VDD    (vdd)
        );
        );
 
 
        VDD5ALLPADP vdd_pad_up (
        VDD5ALLPADP vdd_pad_up (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD    (dummy_vdd)
                .VDD    (vdd)
        );
        );
 
 
        VDD5ALLPADP vdd_pad_down (
        VDD5ALLPADP vdd_pad_down (
                .CLAMPC (dummy_clampc),
                .CLAMPC (dummy_clampc),
                .GND5O  (dummy_gnd),
                .GND5O  (gnd),
                .GND5R  (dummy_gnd),
                .GND5R  (gnd),
                .VDD    (dummy_vdd)
                .VDD    (vdd)
        );
        );
 
 
        FILLERP_110 filler0 (
        assign muxed = (reset_nIO == 1'b1) ? chainfinal : rw_memIO;
                .CLAMPC (dummy_clampc),
 
                .VDD5O  (dummy_vdd),
 
                .VDD5R  (dummy_vdd),
/*      FILLERP_110 filler0 (
                .GND5O  (dummy_gnd),
                .CLAMPC (dummy_clampc),
                .GND5R  (dummy_gnd)
                .VDD5O  (vdd),
        );
                .VDD5R  (vdd),
 
                .GND5O  (gnd),
        FILLERP_110 filler1 (
                .GND5R  (gnd)
                .CLAMPC (dummy_clampc),
        );
                .VDD5O  (dummy_vdd),
 
                .VDD5R  (dummy_vdd),
        FILLERP_110 filler1 (
                .GND5O  (dummy_gnd),
                .CLAMPC (dummy_clampc),
                .GND5R  (dummy_gnd)
                .VDD5O  (vdd),
        );
                .VDD5R  (vdd),
 
                .GND5O  (gnd),
 
                .GND5R  (gnd)
 
        );
 
*/
endmodule
endmodule
 
 
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